linux/drivers/clk/rockchip
Xing Zheng 99222c9e4d clk: rockchip: rk3036: fix the FLAGs for clock mux
The DFLAGS are used for the clock dividers, the CLKSEL_CON flags
of COMPOSITE_NODIV type should be MFLAGS.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-16 16:01:21 +01:00
..
clk-cpu.c clk: rockchip: allow more than 2 parents for cpuclk 2015-12-09 22:30:42 +01:00
clk-inverter.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-mmc-phase.c The majority of the changes are driver updates and new device 2015-11-05 12:59:36 -08:00
clk-pll.c clk: rockchip: add new pll-type for rk3036 and similar socs 2015-11-23 21:55:07 +01:00
clk-rk3036.c clk: rockchip: rk3036: fix the FLAGs for clock mux 2016-01-16 16:01:21 +01:00
clk-rk3188.c Merge branch 'clk-rockchip' into clk-next 2016-01-02 13:41:09 -08:00
clk-rk3228.c clk: rockchip: only enter pll slow-mode directly before reboots on rk3288 2015-12-21 02:01:19 +01:00
clk-rk3288.c Merge branch 'clk-rockchip' into clk-next 2016-01-02 13:41:09 -08:00
clk-rk3368.c clk: rockchip: only enter pll slow-mode directly before reboots on rk3288 2015-12-21 02:01:19 +01:00
clk-rockchip.c
clk.c Merge branch 'clk-rockchip' into clk-next 2015-12-23 13:08:56 -08:00
clk.h Merge branch 'clk-rockchip' into clk-next 2016-01-02 13:41:09 -08:00
Makefile clk: rockchip: add clock controller for rk3228 2015-12-12 20:04:54 +01:00
softrst.c clk: rockchip: add reset controller 2014-07-13 12:17:07 -07:00