forked from Minki/linux
990f2f223c
The mmp clock drivers currently hardcode the physical addresses for the clock registers. This is generally a bad idea, and it also gets in the way of multiplatform builds, which make the platform header files inaccessible to device drivers. To work around the header file problem, this patch changes the calling convention so the three mmp clock drivers get initialized with the base addresses as arguments from the platform code. It would still be useful to have a larger rework of the clock drivers, with DT integration to let the clocks actually be probed automatically, and the base addresses passed as DT properties. I am unsure if anyone is still interested in the mmp platform, so it is possible that this won't happen. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Chao Xie <chao.xie@marvell.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
182 lines
5.0 KiB
C
182 lines
5.0 KiB
C
/*
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* linux/arch/arm/mach-mmp/pxa168.c
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*
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* Code specific to PXA168
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/clk/mmp.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/mv_usb.h>
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#include <asm/mach/time.h>
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#include <asm/system_misc.h>
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#include <mach/cputype.h>
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#include <mach/addr-map.h>
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#include <mach/regs-apbc.h>
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#include <mach/regs-apmu.h>
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#include <mach/irqs.h>
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#include <mach/dma.h>
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#include <mach/devices.h>
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#include <mach/mfp.h>
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#include <linux/dma-mapping.h>
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#include <mach/pxa168.h>
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#include <mach/regs-usb.h>
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#include "common.h"
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#include "clock.h"
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#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
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static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
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{
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MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
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MFP_ADDR_X(GPIO37, GPIO55, 0x000),
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MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
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MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
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MFP_ADDR_END,
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};
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void __init pxa168_init_irq(void)
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{
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icu_init_irq();
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}
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static int __init pxa168_init(void)
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{
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if (cpu_is_pxa168()) {
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mfp_init_base(MFPR_VIRT_BASE);
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mfp_init_addr(pxa168_mfp_addr_map);
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pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
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pxa168_clk_init(APB_PHYS_BASE + 0x50000,
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AXI_PHYS_BASE + 0x82800,
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APB_PHYS_BASE + 0x15000);
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}
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return 0;
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}
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postcore_initcall(pxa168_init);
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/* system timer - clock enabled, 3.25MHz */
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#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
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#define APBC_TIMERS APBC_REG(0x34)
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void __init pxa168_timer_init(void)
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{
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/* this is early, we have to initialize the CCU registers by
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* ourselves instead of using clk_* API. Clock rate is defined
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* by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
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*/
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__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
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/* 3.25MHz, bus/functional clock enabled, release reset */
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__raw_writel(TIMER_CLK_RST, APBC_TIMERS);
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timer_init(IRQ_PXA168_TIMER1);
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}
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void pxa168_clear_keypad_wakeup(void)
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{
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uint32_t val;
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uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
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/* wake event clear is needed in order to clear keypad interrupt */
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val = __raw_readl(APMU_WAKE_CLR);
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__raw_writel(val | mask, APMU_WAKE_CLR);
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}
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/* on-chip devices */
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PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
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PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
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PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
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PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
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PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
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PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
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PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
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PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
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PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
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PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
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PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
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PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
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PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
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PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
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PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
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PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
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PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
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PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
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struct resource pxa168_resource_gpio[] = {
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{
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.start = 0xd4019000,
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.end = 0xd4019fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PXA168_GPIOX,
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.end = IRQ_PXA168_GPIOX,
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.name = "gpio_mux",
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa168_device_gpio = {
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.name = "mmp-gpio",
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.id = -1,
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.num_resources = ARRAY_SIZE(pxa168_resource_gpio),
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.resource = pxa168_resource_gpio,
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};
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struct resource pxa168_usb_host_resources[] = {
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/* USB Host conroller register base */
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[0] = {
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.start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
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.end = PXA168_U2H_REGBASE + USB_REG_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "capregs",
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},
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/* USB PHY register base */
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[1] = {
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.start = PXA168_U2H_PHYBASE,
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.end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "phyregs",
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},
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[2] = {
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.start = IRQ_PXA168_USB2,
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.end = IRQ_PXA168_USB2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
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struct platform_device pxa168_device_usb_host = {
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.name = "pxa-sph",
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.id = -1,
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.dev = {
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.dma_mask = &pxa168_usb_host_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
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.resource = pxa168_usb_host_resources,
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};
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int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
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{
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pxa168_device_usb_host.dev.platform_data = pdata;
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return platform_device_register(&pxa168_device_usb_host);
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}
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void pxa168_restart(enum reboot_mode mode, const char *cmd)
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{
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soft_restart(0xffff0000);
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}
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