8848f0665b
As we need to start doing some additional work on all idle paths, let's introduce a set of macros that will perform the work related to the GICv3 pseudo-NMI idle entry exit. Stubs are introduced to 32bit ARM for compatibility. As these helpers are currently unused, there is no functional change. Tested-by: Valentin Schneider <valentin.schneider@arm.com> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210615111227.2454465-2-maz@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
57 lines
1.3 KiB
C
57 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CPUIDLE_H
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#define __ASM_CPUIDLE_H
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#include <asm/proc-fns.h>
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#ifdef CONFIG_CPU_IDLE
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extern int arm_cpuidle_init(unsigned int cpu);
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extern int arm_cpuidle_suspend(int index);
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#else
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static inline int arm_cpuidle_init(unsigned int cpu)
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{
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return -EOPNOTSUPP;
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}
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static inline int arm_cpuidle_suspend(int index)
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{
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return -EOPNOTSUPP;
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}
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#endif
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#ifdef CONFIG_ARM64_PSEUDO_NMI
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#include <asm/arch_gicv3.h>
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struct arm_cpuidle_irq_context {
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unsigned long pmr;
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unsigned long daif_bits;
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};
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#define arm_cpuidle_save_irq_context(__c) \
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do { \
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struct arm_cpuidle_irq_context *c = __c; \
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if (system_uses_irq_prio_masking()) { \
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c->daif_bits = read_sysreg(daif); \
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write_sysreg(c->daif_bits | PSR_I_BIT | PSR_F_BIT, \
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daif); \
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c->pmr = gic_read_pmr(); \
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gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET); \
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} \
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} while (0)
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#define arm_cpuidle_restore_irq_context(__c) \
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do { \
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struct arm_cpuidle_irq_context *c = __c; \
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if (system_uses_irq_prio_masking()) { \
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gic_write_pmr(c->pmr); \
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write_sysreg(c->daif_bits, daif); \
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} \
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} while (0)
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#else
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struct arm_cpuidle_irq_context { };
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#define arm_cpuidle_save_irq_context(c) (void)c
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#define arm_cpuidle_restore_irq_context(c) (void)c
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#endif
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#endif
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