forked from Minki/linux
5be9fc23cd
Since v3.18, attempts to deliver IRQ0 are rejected, breaking orion5x. Fix this by increasing all interrupts by one, as did5d6bed2a9cfor dove. Also, force MULTI_IRQ_HANDLER for all orion platforms (including dove) as the specific handler is needed to shift back IRQ numbers by one. [gregory.clement@free-electrons.com]: moved the select MULTI_IRQ_HANDLER from PLAT_ORION_LEGACY to ARCH_ORION5X as it broke the build for dove. Fixes:a71b092a9c("ARM: Convert handle_IRQ to use __handle_domain_irq") Signed-off-by: Benjamin Cama <benoar@dolka.fr> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: <stable@vger.kernel.org> Tested-by: Detlef Vollmann <dv@vollmann.ch>
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* arch/arm/mach-orion5x/include/mach/irqs.h
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*
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* IRQ definitions for Orion SoC
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*
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* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/*
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* Orion Main Interrupt Controller
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*/
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#define IRQ_ORION5X_BRIDGE (1 + 0)
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#define IRQ_ORION5X_DOORBELL_H2C (1 + 1)
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#define IRQ_ORION5X_DOORBELL_C2H (1 + 2)
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#define IRQ_ORION5X_UART0 (1 + 3)
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#define IRQ_ORION5X_UART1 (1 + 4)
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#define IRQ_ORION5X_I2C (1 + 5)
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#define IRQ_ORION5X_GPIO_0_7 (1 + 6)
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#define IRQ_ORION5X_GPIO_8_15 (1 + 7)
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#define IRQ_ORION5X_GPIO_16_23 (1 + 8)
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#define IRQ_ORION5X_GPIO_24_31 (1 + 9)
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#define IRQ_ORION5X_PCIE0_ERR (1 + 10)
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#define IRQ_ORION5X_PCIE0_INT (1 + 11)
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#define IRQ_ORION5X_USB1_CTRL (1 + 12)
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#define IRQ_ORION5X_DEV_BUS_ERR (1 + 14)
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#define IRQ_ORION5X_PCI_ERR (1 + 15)
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#define IRQ_ORION5X_USB_BR_ERR (1 + 16)
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#define IRQ_ORION5X_USB0_CTRL (1 + 17)
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#define IRQ_ORION5X_ETH_RX (1 + 18)
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#define IRQ_ORION5X_ETH_TX (1 + 19)
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#define IRQ_ORION5X_ETH_MISC (1 + 20)
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#define IRQ_ORION5X_ETH_SUM (1 + 21)
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#define IRQ_ORION5X_ETH_ERR (1 + 22)
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#define IRQ_ORION5X_IDMA_ERR (1 + 23)
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#define IRQ_ORION5X_IDMA_0 (1 + 24)
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#define IRQ_ORION5X_IDMA_1 (1 + 25)
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#define IRQ_ORION5X_IDMA_2 (1 + 26)
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#define IRQ_ORION5X_IDMA_3 (1 + 27)
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#define IRQ_ORION5X_CESA (1 + 28)
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#define IRQ_ORION5X_SATA (1 + 29)
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#define IRQ_ORION5X_XOR0 (1 + 30)
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#define IRQ_ORION5X_XOR1 (1 + 31)
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/*
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* Orion General Purpose Pins
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*/
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#define IRQ_ORION5X_GPIO_START 33
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#define NR_GPIO_IRQS 32
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#define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
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#endif
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