3037a52f98
The validation of the CPU registers in the machine check handler is currently split into two parts. The first part is done at the start of the low level mcck_int_handler function, this includes the CPU timer register and the general purpose registers. The second part is done a bit later in s390_do_machine_check for all the other registers, including the control registers, floating pointer control, vector or floating pointer registers, the access registers, the guarded storage registers, the TOD programmable registers and the clock comparator. This is working fine to far but in theory a future extensions could cause the C code to use registers that are not validated yet. A better approach is to validate all CPU registers in "safe" assembler code before any C function is called. Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/*
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* Copyright IBM Corp. 1999, 2009
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*/
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#ifndef __ASM_CTL_REG_H
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#define __ASM_CTL_REG_H
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#include <linux/const.h>
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#define CR2_GUARDED_STORAGE _BITUL(63 - 59)
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#define CR14_CHANNEL_REPORT_SUBMASK _BITUL(63 - 35)
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#define CR14_RECOVERY_SUBMASK _BITUL(63 - 36)
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#define CR14_DEGRADATION_SUBMASK _BITUL(63 - 37)
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#define CR14_EXTERNAL_DAMAGE_SUBMASK _BITUL(63 - 38)
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#define CR14_WARNING_SUBMASK _BITUL(63 - 39)
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#ifndef __ASSEMBLY__
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#include <linux/bug.h>
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#define __ctl_load(array, low, high) do { \
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typedef struct { char _[sizeof(array)]; } addrtype; \
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\
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BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
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asm volatile( \
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" lctlg %1,%2,%0\n" \
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: \
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: "Q" (*(addrtype *)(&array)), "i" (low), "i" (high) \
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: "memory"); \
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} while (0)
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#define __ctl_store(array, low, high) do { \
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typedef struct { char _[sizeof(array)]; } addrtype; \
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\
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BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
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asm volatile( \
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" stctg %1,%2,%0\n" \
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: "=Q" (*(addrtype *)(&array)) \
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: "i" (low), "i" (high)); \
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} while (0)
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static inline void __ctl_set_bit(unsigned int cr, unsigned int bit)
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{
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unsigned long reg;
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__ctl_store(reg, cr, cr);
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reg |= 1UL << bit;
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__ctl_load(reg, cr, cr);
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}
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static inline void __ctl_clear_bit(unsigned int cr, unsigned int bit)
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{
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unsigned long reg;
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__ctl_store(reg, cr, cr);
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reg &= ~(1UL << bit);
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__ctl_load(reg, cr, cr);
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}
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void smp_ctl_set_bit(int cr, int bit);
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void smp_ctl_clear_bit(int cr, int bit);
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union ctlreg0 {
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unsigned long val;
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struct {
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unsigned long : 8;
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unsigned long tcx : 1; /* Transactional-Execution control */
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unsigned long pifo : 1; /* Transactional-Execution Program-
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Interruption-Filtering Override */
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unsigned long : 22;
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unsigned long : 3;
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unsigned long lap : 1; /* Low-address-protection control */
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unsigned long : 4;
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unsigned long edat : 1; /* Enhanced-DAT-enablement control */
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unsigned long : 2;
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unsigned long iep : 1; /* Instruction-Execution-Protection */
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unsigned long : 1;
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unsigned long afp : 1; /* AFP-register control */
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unsigned long vx : 1; /* Vector enablement control */
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unsigned long : 7;
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unsigned long sssm : 1; /* Service signal subclass mask */
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unsigned long : 9;
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};
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};
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union ctlreg2 {
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unsigned long val;
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struct {
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unsigned long : 33;
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unsigned long ducto : 25;
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unsigned long : 1;
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unsigned long gse : 1;
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unsigned long : 1;
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unsigned long tds : 1;
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unsigned long tdc : 2;
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};
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};
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#ifdef CONFIG_SMP
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# define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
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# define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
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#else
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# define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
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# define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_CTL_REG_H */
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