linux/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
Linus Torvalds 071e5aceeb ARM: Drivers for 5.14
- Reset controllers: Adding support for Microchip Sparx5 Switch.
 
 - Memory controllers: ARM Primecell PL35x SMC memory controller
   driver cleanups and improvements.
 
 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.
 
 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.
 
 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.
 
 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining
   management interfaces and communication (including bus model)
   between partitions both in Normal and Secure Worlds.
 
 - Tegra Memory controller changes, including major rework to deal
   with identity mappings at boot and integration with ARM SMMU
   pieces.
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Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
2021-07-10 09:46:20 -07:00

126 lines
3.3 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX General Power Controller v2
maintainers:
- Andrey Smirnov <andrew.smirnov@gmail.com>
description: |
The i.MX7S/D General Power Control (GPC) block contains Power Gating
Control (PGC) for various power domains.
Power domains contained within GPC node are generic power domain
providers, documented in
Documentation/devicetree/bindings/power/power-domain.yaml, which are
described as subnodes of the power gating controller 'pgc' node.
IP cores belonging to a power domain should contain a 'power-domains'
property that is a phandle for PGC node representing the domain.
properties:
compatible:
enum:
- fsl,imx7d-gpc
- fsl,imx8mn-gpc
- fsl,imx8mq-gpc
- fsl,imx8mm-gpc
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 3
pgc:
type: object
description: list of power domains provided by this controller.
patternProperties:
"power-domain@[0-9]$":
type: object
properties:
'#power-domain-cells':
const: 0
reg:
description: |
Power domain index. Valid values are defined in
include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc
maxItems: 1
clocks:
description: |
A number of phandles to clocks that need to be enabled during domain
power-up sequencing to ensure reset propagation into devices located
inside this power domain.
minItems: 1
maxItems: 5
power-supply: true
resets:
description: |
A number of phandles to resets that need to be asserted during
power-up sequencing of the domain. The resets belong to devices
located inside the power domain, which need to be held in reset
across the power-up sequence. So no means to specify what each
reset is in a generic power-domain binding.
minItems: 1
maxItems: 4
required:
- '#power-domain-cells'
- reg
required:
- compatible
- reg
- interrupts
- pgc
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
gpc@303a0000 {
compatible = "fsl,imx7d-gpc";
reg = <0x303a0000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
pgc {
#address-cells = <1>;
#size-cells = <0>;
pgc_mipi_phy: power-domain@0 {
#power-domain-cells = <0>;
reg = <0>;
power-supply = <&reg_1p0d>;
};
pgc_pcie_phy: power-domain@1 {
#power-domain-cells = <0>;
reg = <1>;
power-supply = <&reg_1p0d>;
};
pgc_hsic_phy: power-domain@2 {
#power-domain-cells = <0>;
reg = <2>;
power-supply = <&reg_1p2>;
};
};
};