Andi Kleen 9529835514 perf/x86: Move Nehalem PEBS code to flag ... Minor cleanup: use an explicit x86_pmu flag to handle the missing Lock / TLB information on Nehalem, instead of always checking the model number for each PEBS sample. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: acme@kernel.org Cc: jolsa@kernel.org Link: http://lkml.kernel.org/r/20170816222156.19953-2-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>		2017-08-25 11:04:16 +02:00
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amd	perf/x86/amd/uncore: Get correct number of cores sharing last level cache	2017-08-10 12:08:39 +02:00
intel	perf/x86: Move Nehalem PEBS code to flag	2017-08-25 11:04:16 +02:00
core.c	perf/x86: Fix RDPMC vs. mm_struct tracking	2017-08-10 12:01:08 +02:00
Kconfig	perf/x86: Move Kconfig.perf and other perf configuration bits to events/Kconfig	2016-03-31 10:30:40 +02:00
Makefile	perf/x86/events: Add an AMD-specific Makefile	2017-01-30 12:01:19 +01:00
msr.c	Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2016-07-30 12:56:26 -07:00
perf_event.h	perf/x86: Move Nehalem PEBS code to flag	2017-08-25 11:04:16 +02:00