forked from Minki/linux
f7df9be067
These are all the updates to device tree files for 32-bit platforms, which as usual makes up the bulk of the ARM SoC changes: 462 non-merge changesets, 450 files changed, 23340 insertions, 5216 deletions. The three platforms that are added with the "soc" branch are here as well, and we add some related machine files: - For Aspeed AST2400/AST2500, we get the evaluation platform and the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC - For Oxnas 810SE, the Western Digital "My Book World Edition" is added as the only platform at the moment. - For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are supported On the ARM Realview development platform, we now support all machines with device tree, previously only the board files were supported, which in turn will likely be removed soon. Qualcomm IPQ4019 is the second generation ARM based "Internet Processor", following the IPQ806x that is used in many high-end WiFi routers. This one integrates two ath10k wifi radios that were previously on separate chips. Other boards that got added for existing chips are: - On Ti OMAP family: - Amazon Kindle Fire, first generation, tablet and ebook reader - OnRISC Baltos iR 2110 and 3220 embedded industrial PCs - TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM development systems - On Samsung EXYNOS platform: - Samsung ARTIK5 evaluation board, see https://www.artik.io/modules/overview/artik-5/ - On NXP i.MX platforms: - Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx, TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial SoM modules - Embest MarS Board i.MX6Dual DIY platform - Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX Nitrogen6sx embedded boards - Technexion Pico i.MX6UL compute module - ZII VF610 Development Board - On Marvell embedded (mvebu, orion, kirkwood) platforms: - Linksys Viper (E4200v2 / EA4500) WiFi router - Buffalo Kurobox Pro NAS - On Qualcomm Snapdragon: - Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600 - On Rockchips platform: - mqmaker MiQi single-board computer - On Altera SoCFPGA: - samtec VIN|ING 1000 vehicle communication interface - On Allwinner Sunxi platforms: - Dserve DSRV9703C tablet - Difrnce DIT4350 tablet - Colorfly E708 Q1 tablet - Polaroid MID2809PXE04 tablet - Olimex A20 OLinuXino LIME2 single board computer - Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board computers Across many platforms, bug fixes went in to address warnings that dtc now emits with 'make dtbs W=1'. Further changes for device enablement went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM Versatile Express. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAVzuXhGCrR//JCVInAQJXjhAA1bV0fbREflRQrlXdMb4rNesygH8ikaja gOYHE1yO+tSitHZ5g4w2yAFIEK7DzFdO5rz53BEINZfLCj4LO4495/z9ipqZQEjC rw5IL89jAn8x4wF791SHjLpmmNRbHN2vjLcsX3ShJIHckip/jIbiU2aFJuohA0TU jxpPAZzhaKsu/rDaVzHMS/im4LbZQ2qI3DxUUn6Kt8c468i4Ns22sowqSjh2xO/X YiwHD0eAvDrySfMGiNT82wMMTfMF2KfXZGB885isMP4hK8OIDrOnI5nM9rxyRFfu N14o0+tN1S2JzBHnqOOpib6JxYyCVr+QTjsKGAyR5X1mGINIhX8f1gy0EvFFxXKT rIATc5VTeo4gc1quij8RVtDEp/4iJ8GspH4WGMh1F8tjTe+WUxeSMkxdf6/QY1+Q vZKT0KKihoJQu1xI62NjnaRbfbhwx2BSWehwgXVd72lD19dG5LPw+Nj6/8+Bgouc YxJahgkB9MMtHoNp8huMg33Gr9a07/yVxc4CztXtf7N9phd0nEXov2iM1aBgazLU 8IVd3Z9lZA+4iGVcj3oBJ6K1IkiCmg2qoNyF6tcInR5vPjKLECuxyuZw8VKuUuHD k/s/rymSGRlDN5i4F0h0r4MvQ9gkYfwk8xiL3ofmwYHwo103Q7b7Cw55XRk88EoB appd5QA+pko= =Nx46 -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Arnd Bergmann: "These are all the updates to device tree files for 32-bit platforms, which as usual makes up the bulk of the ARM SoC changes: 462 non-merge changesets, 450 files changed, 23340 insertions, 5216 deletions. The three platforms that are added with the "soc" branch are here as well, and we add some related machine files: - For Aspeed AST2400/AST2500, we get the evaluation platform and the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC - For Oxnas 810SE, the Western Digital "My Book World Edition" is added as the only platform at the moment. - For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are supported On the ARM Realview development platform, we now support all machines with device tree, previously only the board files were supported, which in turn will likely be removed soon. Qualcomm IPQ4019 is the second generation ARM based "Internet Processor", following the IPQ806x that is used in many high-end WiFi routers. This one integrates two ath10k wifi radios that were previously on separate chips. Other boards that got added for existing chips are: Ti OMAP family: - Amazon Kindle Fire, first generation, tablet and ebook reader - OnRISC Baltos iR 2110 and 3220 embedded industrial PCs - TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM development systems Samsung EXYNOS platform: - Samsung ARTIK5 evaluation board, see https://www.artik.io/modules/overview/artik-5/ NXP i.MX platforms: - Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx, TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial SoM modules - Embest MarS Board i.MX6Dual DIY platform - Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX Nitrogen6sx embedded boards - Technexion Pico i.MX6UL compute module - ZII VF610 Development Board Marvell embedded (mvebu, orion, kirkwood) platforms: - Linksys Viper (E4200v2 / EA4500) WiFi router - Buffalo Kurobox Pro NAS Qualcomm Snapdragon: - Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600 Rockchips platform: - mqmaker MiQi single-board computer Altera SoCFPGA: - samtec VIN|ING 1000 vehicle communication interface Allwinner Sunxi platforms: - Dserve DSRV9703C tablet - Difrnce DIT4350 tablet - Colorfly E708 Q1 tablet - Polaroid MID2809PXE04 tablet - Olimex A20 OLinuXino LIME2 single board computer - Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board computers Across many platforms, bug fixes went in to address warnings that dtc now emits with 'make dtbs W=1'. Further changes for device enablement went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM Versatile Express" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits) ARM: dts: tango4: Import watchdog node ARM: dts: tango4: Update cpus node for cpufreq ARM: dts: tango4: Update DT to match clk driver ARM: dts: tango4: Initial thermal support arm/dst: Add Aspeed ast2500 device tree arm/dts: Add Aspeed ast2400 device tree ARM: sun7i: dt: Add pll3 and pll7 clocks ARM: dts: sunxi: Add a olinuxino-lime2-emmc ARM: dts: at91: sama5d4: add trng node ARM: dts: at91: sama5d3: add trng node ARM: dts: at91: sama5d2: add trng node ARM: dts: at91: at91sam9g45 family: reduce the trng register map size ARM: sun4i: dt: Add pll3 and pll7 clocks ARM: sun5i: chip: Enable the TV Encoder ARM: sun5i: r8: Add display blocks to the DTSI ARM: sun5i: a13: Add display and TCON clocks ARM: dts: ux500: configure the accelerometers open drain ARM: mx5: dts: Enable USB OTG on M53EVK ARM: dts: imx6ul-14x14-evk: Add audio support ARM: dts: imx6qdl: Remove unneeded unit-addresses ...
823 lines
21 KiB
Plaintext
823 lines
21 KiB
Plaintext
/*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "dra74x.dtsi"
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#include "am57xx-commercial-grade.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "TI AM5728 BeagleBoard-X15";
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compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
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aliases {
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rtc0 = &mcp_rtc;
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rtc1 = &tps659038_rtc;
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rtc2 = &rtc;
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display0 = &hdmi0;
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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vdd_3v3: fixedregulator-vdd_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vdd_3v3";
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vin-supply = <®en1>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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aic_dvdd: fixedregulator-aic_dvdd {
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compatible = "regulator-fixed";
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regulator-name = "aic_dvdd_fixed";
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vin-supply = <&vdd_3v3>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vtt_fixed: fixedregulator-vtt {
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/* TPS51200 */
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compatible = "regulator-fixed";
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regulator-name = "vtt_fixed";
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vin-supply = <&smps3_reg>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins_default>;
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led@0 {
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label = "beagle-x15:usr0";
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gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led@1 {
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label = "beagle-x15:usr1";
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gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "cpu0";
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default-state = "off";
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};
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led@2 {
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label = "beagle-x15:usr2";
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gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led@3 {
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label = "beagle-x15:usr3";
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gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "ide-disk";
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default-state = "off";
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};
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};
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gpio_fan: gpio_fan {
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/* Based on 5v 500mA AFB02505HHB */
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compatible = "gpio-fan";
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gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
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gpio-fan,speed-map = <0 0>,
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<13000 1>;
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#cooling-cells = <2>;
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};
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hdmi0: connector {
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compatible = "hdmi-connector";
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label = "hdmi";
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type = "a";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&tpd12s015_out>;
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};
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};
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};
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tpd12s015: encoder {
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compatible = "ti,tpd12s015";
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pinctrl-names = "default";
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pinctrl-0 = <&tpd12s015_pins>;
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gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
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<&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
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<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tpd12s015_in: endpoint {
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remote-endpoint = <&hdmi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tpd12s015_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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sound0: sound0 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "BeagleBoard-X15";
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simple-audio-card,widgets =
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"Line", "Line Out",
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"Line", "Line In";
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simple-audio-card,routing =
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"Line Out", "LLOUT",
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"Line Out", "RLOUT",
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"MIC2L", "Line In",
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"MIC2R", "Line In";
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simple-audio-card,format = "dsp_b";
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simple-audio-card,bitclock-master = <&sound0_master>;
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simple-audio-card,frame-master = <&sound0_master>;
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simple-audio-card,bitclock-inversion;
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simple-audio-card,cpu {
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sound-dai = <&mcasp3>;
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};
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sound0_master: simple-audio-card,codec {
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sound-dai = <&tlv320aic3104>;
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clocks = <&clkout2_clk>;
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};
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};
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};
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&dra7_pmx_core {
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leds_pins_default: leds_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
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DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
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DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
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DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
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>;
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};
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i2c1_pins_default: i2c1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
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DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
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>;
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};
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hdmi_pins: pinmux_hdmi_pins {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
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DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
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>;
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};
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i2c3_pins_default: i2c3_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
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DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
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>;
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};
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uart3_pins_default: uart3_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
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DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
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>;
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};
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mmc1_pins_default: mmc1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
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DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
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DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
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DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
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DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
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DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
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DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
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>;
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};
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mmc2_pins_default: mmc2_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
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DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
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DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
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DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
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DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
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DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
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DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
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DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
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DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
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DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
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>;
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};
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cpsw_pins_default: cpsw_pins_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
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DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
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DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
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DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
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DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
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DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
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DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
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DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
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DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
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DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
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DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
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DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
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/* Slave 2 */
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DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
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DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
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DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
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DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
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DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
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DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
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DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
|
|
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
|
|
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
|
|
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
|
|
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
|
|
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
|
|
>;
|
|
|
|
};
|
|
|
|
cpsw_pins_sleep: cpsw_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
/* Slave 1 */
|
|
DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
|
|
|
|
/* Slave 2 */
|
|
DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
|
|
>;
|
|
};
|
|
|
|
davinci_mdio_pins_default: davinci_mdio_pins_default {
|
|
pinctrl-single,pins = <
|
|
/* MDIO */
|
|
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
|
|
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
|
|
>;
|
|
};
|
|
|
|
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
|
|
>;
|
|
};
|
|
|
|
tps659038_pins_default: tps659038_pins_default {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
|
>;
|
|
};
|
|
|
|
tmp102_pins_default: tmp102_pins_default {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
|
|
>;
|
|
};
|
|
|
|
mcp79410_pins_default: mcp79410_pins_default {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
|
>;
|
|
};
|
|
|
|
usb1_pins: pinmux_usb1_pins {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
|
>;
|
|
};
|
|
|
|
tpd12s015_pins: pinmux_tpd12s015_pins {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
|
|
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
|
DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
|
|
>;
|
|
};
|
|
|
|
clkout2_pins_default: clkout2_pins_default {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
|
|
>;
|
|
};
|
|
|
|
clkout2_pins_sleep: clkout2_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
|
|
>;
|
|
};
|
|
|
|
mcasp3_pins_default: mcasp3_pins_default {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
|
|
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
|
|
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
|
|
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
|
|
>;
|
|
};
|
|
|
|
mcasp3_pins_sleep: mcasp3_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
|
|
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
|
|
>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_pins_default>;
|
|
clock-frequency = <400000>;
|
|
|
|
tps659038: tps659038@58 {
|
|
compatible = "ti,tps659038";
|
|
reg = <0x58>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&tps659038_pins_default>;
|
|
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
|
|
ti,system-power-controller;
|
|
|
|
tps659038_pmic {
|
|
compatible = "ti,tps659038-pmic";
|
|
|
|
regulators {
|
|
smps12_reg: smps12 {
|
|
/* VDD_MPU */
|
|
regulator-name = "smps12";
|
|
regulator-min-microvolt = < 850000>;
|
|
regulator-max-microvolt = <1250000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
smps3_reg: smps3 {
|
|
/* VDD_DDR */
|
|
regulator-name = "smps3";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
smps45_reg: smps45 {
|
|
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
|
|
regulator-name = "smps45";
|
|
regulator-min-microvolt = < 850000>;
|
|
regulator-max-microvolt = <1250000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
smps6_reg: smps6 {
|
|
/* VDD_CORE */
|
|
regulator-name = "smps6";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1150000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* SMPS7 unused */
|
|
|
|
smps8_reg: smps8 {
|
|
/* VDD_1V8 */
|
|
regulator-name = "smps8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* SMPS9 unused */
|
|
|
|
ldo1_reg: ldo1 {
|
|
/* VDD_SD / VDDSHV8 */
|
|
regulator-name = "ldo1";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo2_reg: ldo2 {
|
|
/* VDD_SHV5 */
|
|
regulator-name = "ldo2";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo3_reg: ldo3 {
|
|
/* VDDA_1V8_PHYA */
|
|
regulator-name = "ldo3";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo4_reg: ldo4 {
|
|
/* VDDA_1V8_PHYB */
|
|
regulator-name = "ldo4";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo9_reg: ldo9 {
|
|
/* VDD_RTC */
|
|
regulator-name = "ldo9";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldoln_reg: ldoln {
|
|
/* VDDA_1V8_PLL */
|
|
regulator-name = "ldoln";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldousb_reg: ldousb {
|
|
/* VDDA_3V_USB: VDDA_USBHS33 */
|
|
regulator-name = "ldousb";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
regen1: regen1 {
|
|
/* VDD_3V3_ON */
|
|
regulator-name = "regen1";
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
tps659038_rtc: tps659038_rtc {
|
|
compatible = "ti,palmas-rtc";
|
|
interrupt-parent = <&tps659038>;
|
|
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
|
wakeup-source;
|
|
};
|
|
|
|
tps659038_pwr_button: tps659038_pwr_button {
|
|
compatible = "ti,palmas-pwrbutton";
|
|
interrupt-parent = <&tps659038>;
|
|
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
|
wakeup-source;
|
|
ti,palmas-long-press-seconds = <12>;
|
|
};
|
|
|
|
tps659038_gpio: tps659038_gpio {
|
|
compatible = "ti,palmas-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
extcon_usb2: tps659038_usb {
|
|
compatible = "ti,palmas-usb-vid";
|
|
ti,enable-vbus-detection;
|
|
vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
};
|
|
|
|
tmp102: tmp102@48 {
|
|
compatible = "ti,tmp102";
|
|
reg = <0x48>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&tmp102_pins_default>;
|
|
interrupt-parent = <&gpio7>;
|
|
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
|
#thermal-sensor-cells = <1>;
|
|
};
|
|
|
|
tlv320aic3104: tlv320aic3104@18 {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "ti,tlv320aic3104";
|
|
reg = <0x18>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&clkout2_pins_default>;
|
|
pinctrl-1 = <&clkout2_pins_sleep>;
|
|
assigned-clocks = <&clkoutmux2_clk_mux>;
|
|
assigned-clock-parents = <&sys_clk2_dclk_div>;
|
|
|
|
status = "okay";
|
|
adc-settle-ms = <40>;
|
|
|
|
AVDD-supply = <&vdd_3v3>;
|
|
IOVDD-supply = <&vdd_3v3>;
|
|
DRVDD-supply = <&vdd_3v3>;
|
|
DVDD-supply = <&aic_dvdd>;
|
|
};
|
|
|
|
eeprom: eeprom@50 {
|
|
compatible = "at,24c32";
|
|
reg = <0x50>;
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c3_pins_default>;
|
|
clock-frequency = <400000>;
|
|
|
|
mcp_rtc: rtc@6f {
|
|
compatible = "microchip,mcp7941x";
|
|
reg = <0x6f>;
|
|
interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
|
|
<&dra7_pmx_core 0x424>;
|
|
interrupt-names = "irq", "wakeup";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcp79410_pins_default>;
|
|
|
|
vcc-supply = <&vdd_3v3>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
&gpio7 {
|
|
ti,no-reset-on-init;
|
|
ti,no-idle-on-init;
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu0-supply = <&smps12_reg>;
|
|
voltage-tolerance = <1>;
|
|
};
|
|
|
|
&uart3 {
|
|
status = "okay";
|
|
interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
|
<&dra7_pmx_core 0x3f8>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart3_pins_default>;
|
|
};
|
|
|
|
&mac {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_pins_default>;
|
|
pinctrl-1 = <&cpsw_pins_sleep>;
|
|
dual_emac;
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy_id = <&davinci_mdio>, <1>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <1>;
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy_id = <&davinci_mdio>, <2>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <2>;
|
|
};
|
|
|
|
&davinci_mdio {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_pins_default>;
|
|
pinctrl-1 = <&davinci_mdio_pins_sleep>;
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
|
|
|
vmmc-supply = <&ldo1_reg>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
|
|
};
|
|
|
|
&mmc2 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc2_pins_default>;
|
|
|
|
vmmc-supply = <&vdd_3v3>;
|
|
bus-width = <8>;
|
|
ti,non-removable;
|
|
cap-mmc-dual-data-rate;
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
phy-supply = <&ldousb_reg>;
|
|
};
|
|
|
|
&usb2_phy2 {
|
|
phy-supply = <&ldousb_reg>;
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "host";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&usb1_pins>;
|
|
};
|
|
|
|
&omap_dwc3_2 {
|
|
extcon = <&extcon_usb2>;
|
|
};
|
|
|
|
&usb2 {
|
|
/*
|
|
* Stand alone usage is peripheral only.
|
|
* However, with some resistor modifications
|
|
* this port can be used via expansion connectors
|
|
* as "host" or "dual-role". If so, provide
|
|
* the necessary dr_mode override in the expansion
|
|
* board's DT.
|
|
*/
|
|
dr_mode = "peripheral";
|
|
};
|
|
|
|
&cpu_trips {
|
|
cpu_alert1: cpu_alert1 {
|
|
temperature = <50000>; /* millicelsius */
|
|
hysteresis = <2000>; /* millicelsius */
|
|
type = "active";
|
|
};
|
|
};
|
|
|
|
&cpu_cooling_maps {
|
|
map1 {
|
|
trip = <&cpu_alert1>;
|
|
cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
|
|
&thermal_zones {
|
|
board_thermal: board_thermal {
|
|
polling-delay-passive = <1250>; /* milliseconds */
|
|
polling-delay = <1500>; /* milliseconds */
|
|
|
|
/* sensor ID */
|
|
thermal-sensors = <&tmp102 0>;
|
|
|
|
board_trips: trips {
|
|
board_alert0: board_alert {
|
|
temperature = <40000>; /* millicelsius */
|
|
hysteresis = <2000>; /* millicelsius */
|
|
type = "active";
|
|
};
|
|
|
|
board_crit: board_crit {
|
|
temperature = <105000>; /* millicelsius */
|
|
hysteresis = <0>; /* millicelsius */
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
board_cooling_maps: cooling-maps {
|
|
map0 {
|
|
trip = <&board_alert0>;
|
|
cooling-device =
|
|
<&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&dss {
|
|
status = "ok";
|
|
|
|
vdda_video-supply = <&ldoln_reg>;
|
|
};
|
|
|
|
&hdmi {
|
|
status = "ok";
|
|
vdda-supply = <&ldo4_reg>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&hdmi_pins>;
|
|
|
|
port {
|
|
hdmi_out: endpoint {
|
|
remote-endpoint = <&tpd12s015_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie1 {
|
|
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
&mcasp3 {
|
|
#sound-dai-cells = <0>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&mcasp3_pins_default>;
|
|
pinctrl-1 = <&mcasp3_pins_sleep>;
|
|
assigned-clocks = <&mcasp3_ahclkx_mux>;
|
|
assigned-clock-parents = <&sys_clkin2>;
|
|
status = "okay";
|
|
|
|
op-mode = <0>; /* MCASP_IIS_MODE */
|
|
tdm-slots = <2>;
|
|
/* 4 serializers */
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
1 2 0 0
|
|
>;
|
|
tx-num-evt = <32>;
|
|
rx-num-evt = <32>;
|
|
};
|
|
|
|
&mailbox5 {
|
|
status = "okay";
|
|
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
|
status = "okay";
|
|
};
|
|
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&mailbox6 {
|
|
status = "okay";
|
|
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
|
status = "okay";
|
|
};
|
|
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
|
|
status = "okay";
|
|
};
|
|
};
|