forked from Minki/linux
7c93c200f6
Since all the used PWM prescalers and dividers configuration has been moved to appropriate drivers, the pwm-clock infrastructure is now unused and so this patch removes it. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
153 lines
4.4 KiB
C
153 lines
4.4 KiB
C
/* linux/arch/arm/plat-s3c/include/plat/clock.h
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*
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* Copyright (c) 2004-2005 Simtec Electronics
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* http://www.simtec.co.uk/products/SWLINUX/
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* Written by Ben Dooks, <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PLAT_CLOCK_H
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#define __ASM_PLAT_CLOCK_H __FILE__
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#include <linux/spinlock.h>
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#include <linux/clkdev.h>
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struct clk;
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/**
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* struct clk_ops - standard clock operations
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* @set_rate: set the clock rate, see clk_set_rate().
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* @get_rate: get the clock rate, see clk_get_rate().
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* @round_rate: round a given clock rate, see clk_round_rate().
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* @set_parent: set the clock's parent, see clk_set_parent().
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*
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* Group the common clock implementations together so that we
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* don't have to keep setting the same fields again. We leave
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* enable in struct clk.
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*
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* Adding an extra layer of indirection into the process should
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* not be a problem as it is unlikely these operations are going
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* to need to be called quickly.
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*/
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struct clk_ops {
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int (*set_rate)(struct clk *c, unsigned long rate);
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unsigned long (*get_rate)(struct clk *c);
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unsigned long (*round_rate)(struct clk *c, unsigned long rate);
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int (*set_parent)(struct clk *c, struct clk *parent);
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};
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struct clk {
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struct list_head list;
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struct module *owner;
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struct clk *parent;
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const char *name;
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const char *devname;
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int id;
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int usage;
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unsigned long rate;
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unsigned long ctrlbit;
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struct clk_ops *ops;
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int (*enable)(struct clk *, int enable);
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struct clk_lookup lookup;
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#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
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struct dentry *dent; /* For visible tree hierarchy */
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#endif
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};
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/* other clocks which may be registered by board support */
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extern struct clk s3c24xx_dclk0;
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extern struct clk s3c24xx_dclk1;
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extern struct clk s3c24xx_clkout0;
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extern struct clk s3c24xx_clkout1;
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extern struct clk s3c24xx_uclk;
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extern struct clk clk_usb_bus;
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/* core clock support */
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extern struct clk clk_f;
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extern struct clk clk_h;
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extern struct clk clk_p;
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extern struct clk clk_mpll;
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extern struct clk clk_upll;
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extern struct clk clk_epll;
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extern struct clk clk_xtal;
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extern struct clk clk_ext;
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/* S3C2443/S3C2416 specific clocks */
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extern struct clksrc_clk clk_epllref;
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extern struct clksrc_clk clk_esysclk;
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/* S3C24XX UART clocks */
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extern struct clk s3c24xx_clk_uart0;
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extern struct clk s3c24xx_clk_uart1;
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extern struct clk s3c24xx_clk_uart2;
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/* S3C64XX specific clocks */
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extern struct clk clk_h2;
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extern struct clk clk_27m;
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extern struct clk clk_48m;
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extern struct clk clk_xusbxti;
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extern int clk_default_setrate(struct clk *clk, unsigned long rate);
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extern struct clk_ops clk_ops_def_setrate;
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/* exports for arch/arm/mach-s3c2410
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*
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* Please DO NOT use these outside of arch/arm/mach-s3c2410
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*/
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extern spinlock_t clocks_lock;
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extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
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extern int s3c24xx_register_clock(struct clk *clk);
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extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
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extern void s3c_register_clocks(struct clk *clk, int nr_clks);
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extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
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extern int s3c24xx_register_baseclocks(unsigned long xtal);
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extern void s5p_register_clocks(unsigned long xtal_freq);
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extern void s3c24xx_setup_clocks(unsigned long fclk,
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unsigned long hclk,
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unsigned long pclk);
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extern void s3c2410_setup_clocks(void);
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extern void s3c2412_setup_clocks(void);
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extern void s3c244x_setup_clocks(void);
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/* S3C2410 specific clock functions */
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extern int s3c2410_baseclk_add(void);
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/* S3C2443/S3C2416 specific clock functions */
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typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base);
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extern void s3c2443_common_setup_clocks(pll_fn get_mpll);
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extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
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unsigned int *divs, int nr_divs,
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int divmask);
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extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable);
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extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable);
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extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
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/* S3C64XX specific functions and clocks */
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extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
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/* Global watchdog clock used by arch_wtd_reset() callback */
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extern struct clk *s3c2410_wdtclk;
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#endif /* __ASM_PLAT_CLOCK_H */
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