forked from Minki/linux
f2e0a53271
Some clocks are using a multiplier component, however, unlike their mux, gate or divider counterpart, these factors don't have a basic clock implementation. This leads to code duplication across platforms that want to use that kind of clocks, and the impossibility to use the composite clocks with such a clock without defining your own rate operations. Create such a driver in order to remove these issues, and hopefully factor the implementations, reducing code size across platforms and consolidating the various implementations. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
182 lines
4.4 KiB
C
182 lines
4.4 KiB
C
/*
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* Copyright (C) 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/bitops.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#define to_clk_multiplier(_hw) container_of(_hw, struct clk_multiplier, hw)
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static unsigned long __get_mult(struct clk_multiplier *mult,
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unsigned long rate,
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unsigned long parent_rate)
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{
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if (mult->flags & CLK_MULTIPLIER_ROUND_CLOSEST)
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return DIV_ROUND_CLOSEST(rate, parent_rate);
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return rate / parent_rate;
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}
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static unsigned long clk_multiplier_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_multiplier *mult = to_clk_multiplier(hw);
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unsigned long val;
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val = clk_readl(mult->reg) >> mult->shift;
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val &= GENMASK(mult->width - 1, 0);
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if (!val && mult->flags & CLK_MULTIPLIER_ZERO_BYPASS)
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val = 1;
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return parent_rate * val;
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}
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static bool __is_best_rate(unsigned long rate, unsigned long new,
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unsigned long best, unsigned long flags)
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{
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if (flags & CLK_MULTIPLIER_ROUND_CLOSEST)
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return abs(rate - new) < abs(rate - best);
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return new >= rate && new < best;
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}
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static unsigned long __bestmult(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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u8 width, unsigned long flags)
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{
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unsigned long orig_parent_rate = *best_parent_rate;
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unsigned long parent_rate, current_rate, best_rate = ~0;
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unsigned int i, bestmult = 0;
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if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT))
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return rate / *best_parent_rate;
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for (i = 1; i < ((1 << width) - 1); i++) {
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if (rate == orig_parent_rate * i) {
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/*
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* This is the best case for us if we have a
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* perfect match without changing the parent
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* rate.
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*/
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*best_parent_rate = orig_parent_rate;
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return i;
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}
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parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
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rate / i);
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current_rate = parent_rate * i;
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if (__is_best_rate(rate, current_rate, best_rate, flags)) {
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bestmult = i;
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best_rate = current_rate;
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*best_parent_rate = parent_rate;
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}
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}
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return bestmult;
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}
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static long clk_multiplier_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct clk_multiplier *mult = to_clk_multiplier(hw);
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unsigned long factor = __bestmult(hw, rate, parent_rate,
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mult->width, mult->flags);
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return *parent_rate * factor;
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}
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static int clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_multiplier *mult = to_clk_multiplier(hw);
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unsigned long factor = __get_mult(mult, rate, parent_rate);
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unsigned long flags = 0;
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unsigned long val;
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if (mult->lock)
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spin_lock_irqsave(mult->lock, flags);
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else
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__acquire(mult->lock);
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val = clk_readl(mult->reg);
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val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift);
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val |= factor << mult->shift;
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clk_writel(val, mult->reg);
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if (mult->lock)
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spin_unlock_irqrestore(mult->lock, flags);
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else
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__release(mult->lock);
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return 0;
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}
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const struct clk_ops clk_multiplier_ops = {
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.recalc_rate = clk_multiplier_recalc_rate,
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.round_rate = clk_multiplier_round_rate,
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.set_rate = clk_multiplier_set_rate,
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};
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EXPORT_SYMBOL_GPL(clk_multiplier_ops);
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struct clk *clk_register_multiplier(struct device *dev, const char *name,
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const char *parent_name,
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unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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u8 clk_mult_flags, spinlock_t *lock)
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{
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struct clk_init_data init;
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struct clk_multiplier *mult;
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struct clk *clk;
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mult = kmalloc(sizeof(*mult), GFP_KERNEL);
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if (!mult)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_multiplier_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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mult->reg = reg;
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mult->shift = shift;
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mult->width = width;
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mult->flags = clk_mult_flags;
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mult->lock = lock;
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mult->hw.init = &init;
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clk = clk_register(dev, &mult->hw);
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if (IS_ERR(clk))
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kfree(mult);
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return clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_multiplier);
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void clk_unregister_multiplier(struct clk *clk)
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{
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struct clk_multiplier *mult;
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struct clk_hw *hw;
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hw = __clk_get_hw(clk);
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if (!hw)
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return;
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mult = to_clk_multiplier(hw);
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clk_unregister(clk);
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kfree(mult);
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}
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EXPORT_SYMBOL_GPL(clk_unregister_multiplier);
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