b138eca661
This adds support for enabling automatic clockgating on nvidia GPUs for Kepler1. While this is not technically a clockgating level, it does enable clockgating using the clockgating values initially set by the vbios (which should be safe to use). This introduces two therm helpers for controlling basic clockgating: nvkm_therm_clkgate_enable() - enables clockgating through CG_CTRL, done after initializing the GPU fully nvkm_therm_clkgate_fini() - prepares clockgating for suspend or driver unload A lot of this code was originally going to be based off of fermi; however it turns out that while Fermi's the first line of GPUs that introduced this kind of power saving, Fermi requires more fine tuned control of the CG_CTRL registers from the driver while reclocking that we don't entirely understand yet. For the simple parts we will be sharing with Fermi for certain however, we at least add those into a new subdev/therm/gf100.h header. Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
154 lines
4.4 KiB
C
154 lines
4.4 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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static int
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pwm_info(struct nvkm_therm *therm, int line)
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{
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struct nvkm_subdev *subdev = &therm->subdev;
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struct nvkm_device *device = subdev->device;
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u32 gpio = nvkm_rd32(device, 0x00d610 + (line * 0x04));
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switch (gpio & 0x000000c0) {
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case 0x00000000: /* normal mode, possibly pwm forced off by us */
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case 0x00000040: /* nvio special */
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switch (gpio & 0x0000001f) {
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case 0x00: return 2;
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case 0x19: return 1;
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case 0x1c: return 0;
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case 0x1e: return 2;
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default:
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break;
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}
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default:
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break;
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}
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nvkm_error(subdev, "GPIO %d unknown PWM: %08x\n", line, gpio);
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return -ENODEV;
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}
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int
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gf119_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
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{
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struct nvkm_device *device = therm->subdev.device;
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u32 data = enable ? 0x00000040 : 0x00000000;
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int indx = pwm_info(therm, line);
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if (indx < 0)
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return indx;
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else if (indx < 2)
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nvkm_mask(device, 0x00d610 + (line * 0x04), 0x000000c0, data);
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/* nothing to do for indx == 2, it seems hardwired to PTHERM */
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return 0;
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}
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int
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gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
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{
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struct nvkm_device *device = therm->subdev.device;
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int indx = pwm_info(therm, line);
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if (indx < 0)
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return indx;
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else if (indx < 2) {
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if (nvkm_rd32(device, 0x00d610 + (line * 0x04)) & 0x00000040) {
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*divs = nvkm_rd32(device, 0x00e114 + (indx * 8));
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*duty = nvkm_rd32(device, 0x00e118 + (indx * 8));
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return 0;
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}
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} else if (indx == 2) {
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*divs = nvkm_rd32(device, 0x0200d8) & 0x1fff;
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*duty = nvkm_rd32(device, 0x0200dc) & 0x1fff;
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return 0;
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}
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return -EINVAL;
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}
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int
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gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
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{
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struct nvkm_device *device = therm->subdev.device;
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int indx = pwm_info(therm, line);
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if (indx < 0)
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return indx;
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else if (indx < 2) {
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nvkm_wr32(device, 0x00e114 + (indx * 8), divs);
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nvkm_wr32(device, 0x00e118 + (indx * 8), duty | 0x80000000);
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} else if (indx == 2) {
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nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */
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nvkm_wr32(device, 0x0200dc, duty | 0x40000000);
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}
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return 0;
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}
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int
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gf119_fan_pwm_clock(struct nvkm_therm *therm, int line)
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{
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struct nvkm_device *device = therm->subdev.device;
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int indx = pwm_info(therm, line);
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if (indx < 0)
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return 0;
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else if (indx < 2)
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return (device->crystal * 1000) / 20;
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else
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return device->crystal * 1000 / 10;
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}
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void
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gf119_therm_init(struct nvkm_therm *therm)
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{
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struct nvkm_device *device = therm->subdev.device;
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g84_sensor_setup(therm);
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/* enable fan tach, count revolutions per-second */
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nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
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if (therm->fan->tach.func != DCB_GPIO_UNUSED) {
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nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line);
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nvkm_wr32(device, 0x00e724, device->crystal * 1000);
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nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
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}
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nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
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}
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static const struct nvkm_therm_func
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gf119_therm = {
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.init = gf119_therm_init,
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.fini = g84_therm_fini,
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.pwm_ctrl = gf119_fan_pwm_ctrl,
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.pwm_get = gf119_fan_pwm_get,
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.pwm_set = gf119_fan_pwm_set,
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.pwm_clock = gf119_fan_pwm_clock,
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.temp_get = g84_temp_get,
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.fan_sense = gt215_therm_fan_sense,
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.program_alarms = nvkm_therm_program_alarms_polling,
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};
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int
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gf119_therm_new(struct nvkm_device *device, int index,
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struct nvkm_therm **ptherm)
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{
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return nvkm_therm_new_(&gf119_therm, device, index, ptherm);
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}
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