forked from Minki/linux
be8454afc5
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdLMSbAAoJEAx081l5xIa+udkP/iWr8mw44tWYb8Wuzc/aR91v 02X/J4S9XTQttNn/1Gpq9ItTLMf0Gc08tk1wEBBHAWi/qGaGZS2al+rv0afeuuQa aFhQzioDi7K/YZt92iEJhdx7wVMyydICTg3INmYlSP7/FyzLp6gBQRGSJ1kX5mHZ qWsFZgUOH9V5evyB6fDMleDaqFOKfcwrD7XYwbOheL/HeYQSv5AYn3VBupBFQ76L 0hclI5VzZQ5V0nnqRTNDQVA9Yl6NTl+2eXTn5vuBtwKXEI6JJw8eihZp2oZDXqfS L441w7wGbkRPzN5kjMZjs1ToPMTlMveR5kL6Sc+o3DT/HmIr1odeaSDXR/93UOLd z0CRJ6xMC8h1ThLNHp8UgbxCKqIwYPsY2wVqjsJt7lDY5jma7Yv2YJ9ocYGHN/sO DVHcU6ugbwvuC5wZZtVZl5J4hjnBZwNRGSVK+iM0tkjalgdEuSFehXT7eQ8SphF/ yI5gD1xNEwGfZ4bvZ3u/QrDCcpUAgPIUYmxEa2tPJILQWOJ9O87yc0y9Z21k9Ef1 9yDqrFV3sPqC2xj/0ufZG/18+Yt99Ykg1jQE3RGDwD/59KAeqPbOvqTKyVODV9jE qje6ScSIc2G0713uss2bcaD3k+rCB5YL2JkKrk5OWW/T2+n9T+JFaiNh7dnSFFcU gBKyeY24OyCDMwXrby0K =SI+Y -----END PGP SIGNATURE----- Merge tag 'drm-next-2019-07-16' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "The biggest thing in this is the AMD Navi GPU support, this again contains a bunch of header files that are large. These are the new AMD RX5700 GPUs that just recently became available. New drivers: - ST-Ericsson MCDE driver - Ingenic JZ47xx SoC UAPI change: - HDR source metadata property Core: - HDR inforframes and EDID parsing - drm hdmi infoframe unpacking - remove prime sg_table caching into dma-buf - New gem vram helpers to reduce driver code - Lots of drmP.h removal - reservation fencing fix - documentation updates - drm_fb_helper_connector removed - mode name command handler rewrite fbcon: - Remove the fbcon notifiers ttm: - forward progress fixes dma-buf: - make mmap call optional - debugfs refcount fixes - dma-fence free with pending signals fix - each dma-buf gets an inode Panels: - Lots of additional panel bindings amdgpu: - initial navi10 support - avoid hw reset - HDR metadata support - new thermal sensors for vega asics - RAS fixes - use HMM rather than MMU notifier - xgmi topology via kfd - SR-IOV fixes - driver reload fixes - DC use a core bpc attribute - Aux fixes for DC - Bandwidth calc updates for DC - Clock handling refactor - kfd VEGAM support vmwgfx: - Coherent memory support changes i915: - HDR Support - HDMI i2c link - Icelake multi-segmented gamma support - GuC firmware update - Mule Creek Canyon PCH support for EHL - EHL platform updtes - move i915.alpha_support to i915.force_probe - runtime PM refactoring - VBT parsing refactoring - DSI fixes - struct mutex dependency reduction - GEM code reorg mali-dp: - Komeda driver features msm: - dsi vs EPROBE_DEFER fixes - msm8998 snapdragon 835 support - a540 gpu support - mdp5 and dpu interconnect support exynos: - drmP.h removal tegra: - misc fixes tda998x: - audio support improvements - pixel repeated mode support - quantisation range handling corrections - HDMI vendor info fix armada: - interlace support fix - overlay/video plane register handling refactor - add gamma support rockchip: - RX3328 support panfrost: - expose perf counters via hidden ioctls vkms: - enumerate CRC sources list ast: - rework BO handling mgag200: - rework BO handling dw-hdmi: - suspend/resume support rcar-du: - R8A774A1 Soc Support - LVDS dual-link mode support - Additional formats - Misc fixes omapdrm: - DSI command mode display support stm - fb modifier support - runtime PM support sun4i: - use vmap ops vc4: - binner bo binding rework v3d: - compute shader support - resync/sync fixes - job management refactoring lima: - NULL pointer in irq handler fix - scheduler default timeout virtio: - fence seqno support - trace events bochs: - misc fixes tc458767: - IRQ/HDP handling sii902x: - HDMI audio support atmel-hlcdc: - misc fixes meson: - zpos support" * tag 'drm-next-2019-07-16' of git://anongit.freedesktop.org/drm/drm: (1815 commits) Revert "Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next" Revert "mm: adjust apply_to_pfn_range interface for dropped token." mm: adjust apply_to_pfn_range interface for dropped token. drm/amdgpu/navi10: add uclk activity sensor drm/amdgpu: properly guard the generic discovery code drm/amdgpu: add missing documentation on new module parameters drm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writeback drm/amd/display: avoid 64-bit division drm/amdgpu/psp11: simplify the ucode register logic drm/amdgpu: properly guard DC support in navi code drm/amd/powerplay: vega20: fix uninitialized variable use drm/amd/display: dcn20: include linux/delay.h amdgpu: make pmu support optional drm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent drm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq drm/amd/powerplay: Use memset to initialize metrics structs drm/amdgpu/mes10.1: Fix header guard drm/amd/powerplay: add temperature sensor support for navi10 drm/amdgpu: fix scheduler timeout calc drm/amdgpu: Prepare for hmm_range_register API change (v2) ...
164 lines
4.6 KiB
C
164 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#ifndef __MSM_GEM_H__
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#define __MSM_GEM_H__
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#include <linux/kref.h>
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#include <linux/reservation.h>
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#include "msm_drv.h"
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/* Additional internal-use only BO flags: */
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#define MSM_BO_STOLEN 0x10000000 /* try to use stolen/splash memory */
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struct msm_gem_address_space {
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const char *name;
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/* NOTE: mm managed at the page level, size is in # of pages
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* and position mm_node->start is in # of pages:
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*/
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struct drm_mm mm;
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spinlock_t lock; /* Protects drm_mm node allocation/removal */
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struct msm_mmu *mmu;
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struct kref kref;
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};
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struct msm_gem_vma {
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struct drm_mm_node node;
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uint64_t iova;
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struct msm_gem_address_space *aspace;
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struct list_head list; /* node in msm_gem_object::vmas */
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bool mapped;
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int inuse;
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};
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struct msm_gem_object {
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struct drm_gem_object base;
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uint32_t flags;
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/**
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* Advice: are the backing pages purgeable?
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*/
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uint8_t madv;
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/**
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* count of active vmap'ing
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*/
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uint8_t vmap_count;
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/* And object is either:
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* inactive - on priv->inactive_list
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* active - on one one of the gpu's active_list.. well, at
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* least for now we don't have (I don't think) hw sync between
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* 2d and 3d one devices which have both, meaning we need to
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* block on submit if a bo is already on other ring
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*
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*/
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struct list_head mm_list;
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struct msm_gpu *gpu; /* non-null if active */
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/* Transiently in the process of submit ioctl, objects associated
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* with the submit are on submit->bo_list.. this only lasts for
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* the duration of the ioctl, so one bo can never be on multiple
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* submit lists.
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*/
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struct list_head submit_entry;
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struct page **pages;
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struct sg_table *sgt;
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void *vaddr;
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struct list_head vmas; /* list of msm_gem_vma */
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struct llist_node freed;
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/* For physically contiguous buffers. Used when we don't have
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* an IOMMU. Also used for stolen/splashscreen buffer.
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*/
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struct drm_mm_node *vram_node;
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struct mutex lock; /* Protects resources associated with bo */
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char name[32]; /* Identifier to print for the debugfs files */
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};
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#define to_msm_bo(x) container_of(x, struct msm_gem_object, base)
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static inline bool is_active(struct msm_gem_object *msm_obj)
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{
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return msm_obj->gpu != NULL;
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}
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static inline bool is_purgeable(struct msm_gem_object *msm_obj)
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{
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WARN_ON(!mutex_is_locked(&msm_obj->base.dev->struct_mutex));
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return (msm_obj->madv == MSM_MADV_DONTNEED) && msm_obj->sgt &&
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!msm_obj->base.dma_buf && !msm_obj->base.import_attach;
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}
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static inline bool is_vunmapable(struct msm_gem_object *msm_obj)
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{
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return (msm_obj->vmap_count == 0) && msm_obj->vaddr;
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}
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/* The shrinker can be triggered while we hold objA->lock, and need
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* to grab objB->lock to purge it. Lockdep just sees these as a single
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* class of lock, so we use subclasses to teach it the difference.
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*
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* OBJ_LOCK_NORMAL is implicit (ie. normal mutex_lock() call), and
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* OBJ_LOCK_SHRINKER is used by shrinker.
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*
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* It is *essential* that we never go down paths that could trigger the
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* shrinker for a purgable object. This is ensured by checking that
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* msm_obj->madv == MSM_MADV_WILLNEED.
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*/
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enum msm_gem_lock {
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OBJ_LOCK_NORMAL,
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OBJ_LOCK_SHRINKER,
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};
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void msm_gem_purge(struct drm_gem_object *obj, enum msm_gem_lock subclass);
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void msm_gem_vunmap(struct drm_gem_object *obj, enum msm_gem_lock subclass);
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void msm_gem_free_work(struct work_struct *work);
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/* Created per submit-ioctl, to track bo's and cmdstream bufs, etc,
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* associated with the cmdstream submission for synchronization (and
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* make it easier to unwind when things go wrong, etc). This only
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* lasts for the duration of the submit-ioctl.
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*/
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struct msm_gem_submit {
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struct drm_device *dev;
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struct msm_gpu *gpu;
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struct msm_gem_address_space *aspace;
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struct list_head node; /* node in ring submit list */
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struct list_head bo_list;
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struct ww_acquire_ctx ticket;
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uint32_t seqno; /* Sequence number of the submit on the ring */
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struct dma_fence *fence;
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struct msm_gpu_submitqueue *queue;
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struct pid *pid; /* submitting process */
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bool valid; /* true if no cmdstream patching needed */
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bool in_rb; /* "sudo" mode, copy cmds into RB */
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struct msm_ringbuffer *ring;
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unsigned int nr_cmds;
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unsigned int nr_bos;
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u32 ident; /* A "identifier" for the submit for logging */
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struct {
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uint32_t type;
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uint32_t size; /* in dwords */
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uint64_t iova;
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uint32_t idx; /* cmdstream buffer idx in bos[] */
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} *cmd; /* array of size nr_cmds */
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struct {
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uint32_t flags;
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union {
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struct msm_gem_object *obj;
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uint32_t handle;
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};
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uint64_t iova;
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} bos[0];
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};
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#endif /* __MSM_GEM_H__ */
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