forked from Minki/linux
a4553358d9
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
100 lines
2.3 KiB
C
100 lines
2.3 KiB
C
/*
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* linux/arch/arm/mach-pxa/generic.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* Code common to all PXA machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Since this file should be linked before any other machine specific file,
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* the __initcall() here will be executed first. This serves as default
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* initialization stuff for PXA machines which can be overridden later if
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* need be.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <mach/hardware.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include <asm/mach-types.h>
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#include <mach/reset.h>
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#include <mach/gpio.h>
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#include <mach/smemc.h>
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#include <mach/pxa3xx-regs.h>
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#include "generic.h"
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void clear_reset_status(unsigned int mask)
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{
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if (cpu_is_pxa2xx())
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pxa2xx_clear_reset_status(mask);
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else {
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/* RESET_STATUS_* has a 1:1 mapping with ARSR */
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ARSR = mask;
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}
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}
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unsigned long get_clock_tick_rate(void)
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{
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unsigned long clock_tick_rate;
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if (cpu_is_pxa25x())
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clock_tick_rate = 3686400;
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else if (machine_is_mainstone())
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clock_tick_rate = 3249600;
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else
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clock_tick_rate = 3250000;
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return clock_tick_rate;
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}
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EXPORT_SYMBOL(get_clock_tick_rate);
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/*
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* Get the clock frequency as reflected by CCCR and the turbo flag.
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* We assume these values have been applied via a fcs.
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* If info is not 0 we also display the current settings.
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*/
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unsigned int get_clk_frequency_khz(int info)
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{
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if (cpu_is_pxa25x())
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return pxa25x_get_clk_frequency_khz(info);
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else if (cpu_is_pxa27x())
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return pxa27x_get_clk_frequency_khz(info);
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return 0;
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}
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EXPORT_SYMBOL(get_clk_frequency_khz);
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/*
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* Intel PXA2xx internal register mapping.
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*
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* Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
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* and cache flush area.
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*/
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static struct map_desc common_io_desc[] __initdata = {
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{ /* Devs */
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.virtual = 0xf2000000,
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.pfn = __phys_to_pfn(0x40000000),
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.length = 0x02000000,
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.type = MT_DEVICE
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}, { /* UNCACHED_PHYS_0 */
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.virtual = 0xff000000,
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.pfn = __phys_to_pfn(0x00000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}
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};
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void __init pxa_map_io(void)
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{
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iotable_init(ARRAY_AND_SIZE(common_io_desc));
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}
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