Michal Simek a753499d43 microblaze: mm: Flush TLB to ensure correct mapping when higmem ON ... MMU contains invalid mapping which wasn't flushed and new mapping is using the same addresses as previous one. That's why TLB miss is not happening to get new correct TLB entry and MMU points to incorrect area. This is replicatable when large files(256MB and more) are copied and checked. Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2017-06-22 15:36:52 +02:00
..
consistent.c	microblaze: Fix mmap for cache coherent memory	2014-12-17 12:59:59 +01:00
fault.c	microblaze: migrate exception table users off module.h and onto extable.h	2017-01-26 10:58:19 -05:00
highmem.c	microblaze: mm: Flush TLB to ensure correct mapping when higmem ON	2017-06-22 15:36:52 +02:00
init.c	treewide: replace obsolete _refok by __ref	2016-08-02 17:31:41 -04:00
Makefile
mmu_context.c
pgtable.c	sched/headers: Prepare to remove the <linux/mm_types.h> dependency from <linux/sched.h>	2017-03-02 08:42:37 +01:00