forked from Minki/linux
92edf8df0f
When I updated the spectre_v2 reporting to handle software count cache
flush I got the logic wrong when there's no software count cache
enabled at all.
The result is that on systems with the software count cache flush
disabled we print:
Mitigation: Indirect branch cache disabled, Software count cache flush
Which correctly indicates that the count cache is disabled, but
incorrectly says the software count cache flush is enabled.
The root of the problem is that we are trying to handle all
combinations of options. But we know now that we only expect to see
the software count cache flush enabled if the other options are false.
So split the two cases, which simplifies the logic and fixes the bug.
We were also missing a space before "(hardware accelerated)".
The result is we see one of:
Mitigation: Indirect branch serialisation (kernel only)
Mitigation: Indirect branch cache disabled
Mitigation: Software count cache flush
Mitigation: Software count cache flush (hardware accelerated)
Fixes: ee13cb249f
("powerpc/64s: Add support for software count cache flush")
Cc: stable@vger.kernel.org # v4.19+
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Reviewed-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Diana Craciun <diana.craciun@nxp.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
436 lines
10 KiB
C
436 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// Security related flags and so on.
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//
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// Copyright 2018, Michael Ellerman, IBM Corporation.
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#include <linux/cpu.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/seq_buf.h>
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#include <asm/asm-prototypes.h>
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#include <asm/code-patching.h>
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#include <asm/debugfs.h>
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#include <asm/security_features.h>
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#include <asm/setup.h>
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unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
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enum count_cache_flush_type {
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COUNT_CACHE_FLUSH_NONE = 0x1,
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COUNT_CACHE_FLUSH_SW = 0x2,
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COUNT_CACHE_FLUSH_HW = 0x4,
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};
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static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
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bool barrier_nospec_enabled;
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static bool no_nospec;
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static bool btb_flush_enabled;
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#ifdef CONFIG_PPC_FSL_BOOK3E
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static bool no_spectrev2;
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#endif
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static void enable_barrier_nospec(bool enable)
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{
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barrier_nospec_enabled = enable;
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do_barrier_nospec_fixups(enable);
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}
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void setup_barrier_nospec(void)
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{
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bool enable;
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/*
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* It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
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* But there's a good reason not to. The two flags we check below are
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* both are enabled by default in the kernel, so if the hcall is not
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* functional they will be enabled.
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* On a system where the host firmware has been updated (so the ori
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* functions as a barrier), but on which the hypervisor (KVM/Qemu) has
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* not been updated, we would like to enable the barrier. Dropping the
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* check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
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* we potentially enable the barrier on systems where the host firmware
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* is not updated, but that's harmless as it's a no-op.
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*/
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enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
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security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
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if (!no_nospec)
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enable_barrier_nospec(enable);
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}
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static int __init handle_nospectre_v1(char *p)
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{
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no_nospec = true;
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return 0;
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}
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early_param("nospectre_v1", handle_nospectre_v1);
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#ifdef CONFIG_DEBUG_FS
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static int barrier_nospec_set(void *data, u64 val)
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{
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switch (val) {
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case 0:
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case 1:
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break;
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default:
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return -EINVAL;
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}
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if (!!val == !!barrier_nospec_enabled)
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return 0;
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enable_barrier_nospec(!!val);
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return 0;
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}
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static int barrier_nospec_get(void *data, u64 *val)
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{
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*val = barrier_nospec_enabled ? 1 : 0;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
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barrier_nospec_get, barrier_nospec_set, "%llu\n");
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static __init int barrier_nospec_debugfs_init(void)
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{
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debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
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&fops_barrier_nospec);
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return 0;
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}
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device_initcall(barrier_nospec_debugfs_init);
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#endif /* CONFIG_DEBUG_FS */
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#ifdef CONFIG_PPC_FSL_BOOK3E
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static int __init handle_nospectre_v2(char *p)
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{
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no_spectrev2 = true;
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return 0;
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}
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early_param("nospectre_v2", handle_nospectre_v2);
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void setup_spectre_v2(void)
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{
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if (no_spectrev2)
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do_btb_flush_fixups();
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else
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btb_flush_enabled = true;
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}
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#endif /* CONFIG_PPC_FSL_BOOK3E */
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#ifdef CONFIG_PPC_BOOK3S_64
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ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
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{
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bool thread_priv;
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thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
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if (rfi_flush || thread_priv) {
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struct seq_buf s;
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seq_buf_init(&s, buf, PAGE_SIZE - 1);
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seq_buf_printf(&s, "Mitigation: ");
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if (rfi_flush)
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seq_buf_printf(&s, "RFI Flush");
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if (rfi_flush && thread_priv)
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seq_buf_printf(&s, ", ");
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if (thread_priv)
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seq_buf_printf(&s, "L1D private per thread");
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seq_buf_printf(&s, "\n");
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return s.len;
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}
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if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
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!security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
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return sprintf(buf, "Not affected\n");
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return sprintf(buf, "Vulnerable\n");
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}
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#endif
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ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct seq_buf s;
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seq_buf_init(&s, buf, PAGE_SIZE - 1);
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if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
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if (barrier_nospec_enabled)
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seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
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else
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seq_buf_printf(&s, "Vulnerable");
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if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
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seq_buf_printf(&s, ", ori31 speculation barrier enabled");
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seq_buf_printf(&s, "\n");
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} else
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seq_buf_printf(&s, "Not affected\n");
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return s.len;
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}
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ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct seq_buf s;
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bool bcs, ccd;
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seq_buf_init(&s, buf, PAGE_SIZE - 1);
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bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
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ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
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if (bcs || ccd) {
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seq_buf_printf(&s, "Mitigation: ");
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if (bcs)
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seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
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if (bcs && ccd)
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seq_buf_printf(&s, ", ");
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if (ccd)
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seq_buf_printf(&s, "Indirect branch cache disabled");
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} else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
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seq_buf_printf(&s, "Mitigation: Software count cache flush");
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if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
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seq_buf_printf(&s, " (hardware accelerated)");
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} else if (btb_flush_enabled) {
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seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
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} else {
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seq_buf_printf(&s, "Vulnerable");
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}
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seq_buf_printf(&s, "\n");
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return s.len;
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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/*
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* Store-forwarding barrier support.
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*/
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static enum stf_barrier_type stf_enabled_flush_types;
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static bool no_stf_barrier;
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bool stf_barrier;
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static int __init handle_no_stf_barrier(char *p)
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{
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pr_info("stf-barrier: disabled on command line.");
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no_stf_barrier = true;
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return 0;
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}
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early_param("no_stf_barrier", handle_no_stf_barrier);
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/* This is the generic flag used by other architectures */
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static int __init handle_ssbd(char *p)
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{
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if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
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/* Until firmware tells us, we have the barrier with auto */
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return 0;
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} else if (strncmp(p, "off", 3) == 0) {
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handle_no_stf_barrier(NULL);
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return 0;
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} else
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return 1;
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return 0;
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}
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early_param("spec_store_bypass_disable", handle_ssbd);
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/* This is the generic flag used by other architectures */
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static int __init handle_no_ssbd(char *p)
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{
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handle_no_stf_barrier(NULL);
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return 0;
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}
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early_param("nospec_store_bypass_disable", handle_no_ssbd);
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static void stf_barrier_enable(bool enable)
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{
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if (enable)
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do_stf_barrier_fixups(stf_enabled_flush_types);
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else
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do_stf_barrier_fixups(STF_BARRIER_NONE);
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stf_barrier = enable;
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}
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void setup_stf_barrier(void)
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{
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enum stf_barrier_type type;
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bool enable, hv;
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hv = cpu_has_feature(CPU_FTR_HVMODE);
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/* Default to fallback in case fw-features are not available */
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if (cpu_has_feature(CPU_FTR_ARCH_300))
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type = STF_BARRIER_EIEIO;
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else if (cpu_has_feature(CPU_FTR_ARCH_207S))
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type = STF_BARRIER_SYNC_ORI;
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else if (cpu_has_feature(CPU_FTR_ARCH_206))
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type = STF_BARRIER_FALLBACK;
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else
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type = STF_BARRIER_NONE;
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enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
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(security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
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(security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
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if (type == STF_BARRIER_FALLBACK) {
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pr_info("stf-barrier: fallback barrier available\n");
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} else if (type == STF_BARRIER_SYNC_ORI) {
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pr_info("stf-barrier: hwsync barrier available\n");
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} else if (type == STF_BARRIER_EIEIO) {
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pr_info("stf-barrier: eieio barrier available\n");
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}
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stf_enabled_flush_types = type;
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if (!no_stf_barrier)
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stf_barrier_enable(enable);
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}
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ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
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{
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if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
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const char *type;
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switch (stf_enabled_flush_types) {
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case STF_BARRIER_EIEIO:
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type = "eieio";
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break;
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case STF_BARRIER_SYNC_ORI:
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type = "hwsync";
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break;
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case STF_BARRIER_FALLBACK:
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type = "fallback";
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break;
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default:
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type = "unknown";
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}
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return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
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}
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if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
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!security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
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return sprintf(buf, "Not affected\n");
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return sprintf(buf, "Vulnerable\n");
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}
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#ifdef CONFIG_DEBUG_FS
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static int stf_barrier_set(void *data, u64 val)
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{
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bool enable;
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if (val == 1)
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enable = true;
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else if (val == 0)
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enable = false;
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else
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return -EINVAL;
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/* Only do anything if we're changing state */
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if (enable != stf_barrier)
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stf_barrier_enable(enable);
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return 0;
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}
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static int stf_barrier_get(void *data, u64 *val)
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{
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*val = stf_barrier ? 1 : 0;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
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static __init int stf_barrier_debugfs_init(void)
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{
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debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
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return 0;
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}
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device_initcall(stf_barrier_debugfs_init);
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#endif /* CONFIG_DEBUG_FS */
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static void toggle_count_cache_flush(bool enable)
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{
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if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
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patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
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count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
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pr_info("count-cache-flush: software flush disabled.\n");
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return;
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}
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patch_branch_site(&patch__call_flush_count_cache,
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(u64)&flush_count_cache, BRANCH_SET_LINK);
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if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
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count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
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pr_info("count-cache-flush: full software flush sequence enabled.\n");
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return;
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}
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patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
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count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
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pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
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}
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void setup_count_cache_flush(void)
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{
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toggle_count_cache_flush(true);
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}
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#ifdef CONFIG_DEBUG_FS
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static int count_cache_flush_set(void *data, u64 val)
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{
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bool enable;
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if (val == 1)
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enable = true;
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else if (val == 0)
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enable = false;
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else
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return -EINVAL;
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toggle_count_cache_flush(enable);
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return 0;
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}
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static int count_cache_flush_get(void *data, u64 *val)
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{
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if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
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*val = 0;
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else
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*val = 1;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
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count_cache_flush_set, "%llu\n");
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static __init int count_cache_flush_debugfs_init(void)
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{
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debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
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NULL, &fops_count_cache_flush);
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return 0;
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}
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device_initcall(count_cache_flush_debugfs_init);
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#endif /* CONFIG_DEBUG_FS */
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#endif /* CONFIG_PPC_BOOK3S_64 */
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