linux/arch/arm/boot/dts/sh73a0.dtsi
Linus Torvalds eb785bef68 ARM: SoC DT updates for 3.18
As usual, this is the largest branch, though this time a little under
 half of the total changes with 307 individual non-merge changesets.
 
 The largest changes are the addition of new machines, in particular
 the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
 for the old i.MX1 platform.
 
 Other changes include
 - at91: various sam9 and sama5 updates
 - exynos: much extended Peach Pi/Pit (Chromebook 2) support
 - keystone: new peripherals
 - meson: added DT for meson6 SoC
 - mvebu: new device support for Armada 370/375
 - qcom: improved support for IPQ8064 and MSM8x60
 - rockchip: much improved support for rk3288
 - shmobile: lots of updates all over the place
 - sunxi: dts license change
 - sunxi: more a23 device support
 - vexpress: CLCD DT description
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVDWVG2CrR//JCVInAQJmARAAnU2I4VpJHlBeHC4CYr/GdRq0NqiFvQ38
 7N/zevUI4l150DtejltbOX71JGM9vD3hq8VXZYBCEpTbG4el9PzAq28Fomtt4tmC
 PGbczQY8ZMvY1/MOT3XLZAd3TSUL0TZRt97t9bdLif6QyPafel5o2pd8D2OG7h+L
 Awtyk9LobT9jU3muFX3ZUfB3Gg2sNKphZjox9Le3gVjGd6g5teEqqMAehK2Y7ArJ
 kixrKck4vgduDdZe59o2yApAUsfIQv/joqu68jv3MUQrKmk4s543+rIdGDuLF5bz
 mEo7qtMXujoNaF3CyLYNEF2ZExIOJDdtmrwjHY8oKIFtIeI/faIJmeSChwa6794t
 Njj5bbnL0Pt61l4gUSFk2hUFo28gpiEB+Mm0R4E1hdoG15Iv6E+lpy44EmEmfz1c
 9h0sATNGUrz18IrUk7jI1WwIaEJUwkbZ+8wKuWtvH+Z+mFA4ZlDykVcnVuELixpb
 vKmI3kcmEw2RsJjkYq3LcgXXQevE4mHRR1ow59yXTY6OR1LmVb7odKUwbrweofQO
 eytVb1deMeYXrBXT5/j6WmrlyDbYcuGsjO4WidT+zwYUiAMCE6bTpNwUWqumVEUv
 LjCBaN6BRIb89EBwt4xIvIu7ir9hNNRZnD8aa4afSzIYxknzZy73pjjT2+wu7jbU
 m15TwYyQG4E=
 =2Sq1
 -----END PGP SIGNATURE-----

Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, this is the largest branch, though this time a little under
  half of the total changes with 307 individual non-merge changesets.

  The largest changes are the addition of new machines, in particular
  the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
  for the old i.MX1 platform.

  Other changes include
   - at91: various sam9 and sama5 updates
   - exynos: much extended Peach Pi/Pit (Chromebook 2) support
   - keystone: new peripherals
   - meson: added DT for meson6 SoC
   - mvebu: new device support for Armada 370/375
   - qcom: improved support for IPQ8064 and MSM8x60
   - rockchip: much improved support for rk3288
   - shmobile: lots of updates all over the place
   - sunxi: dts license change
   - sunxi: more a23 device support
   - vexpress: CLCD DT description"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits)
  ARM: DTS: meson: update DTSI to add watchdog node
  ARM: dts: keystone-k2l: fix mdio io start address
  ARM: dts: keystone-k2e: fix mdio io start address
  ARM: dts: keystone-k2e: update usb1 node for dma properties
  ARM: dts: keystone: fix io range for usb_phy0
  Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt"
  Revert "ARM: dts: hix5hd2: add wdg node"
  ARM: dts: add rk3288 i2s controller
  ARM: vexpress: Add CLCD Device Tree properties
  ARM: bcm2835: add I2S pinctrl to device tree
  ARM: meson: documentation: add bindings documentation
  ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
  ARM: dts: mt6589: Change compatible string for GIC
  ARM: dts: mediatek: Add compatible property for aquaris5
  ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk
  ARM: dts: mt6589: Fix typo in GIC unit address
  ARM: dts: Build dtb for Mediatek board
  ARM: dts: keystone: fix bindings for pcie and usb clock nodes
  ARM: dts: keystone: k2l: Fix chip selects for SPI devices
  ARM: dts: keystone: add dsp gpio controllers nodes
  ...
2014-10-08 17:22:23 -04:00

326 lines
8.3 KiB
Plaintext

/*
* Device Tree Source for the SH73A0 SoC
*
* Copyright (C) 2012 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,sh73a0";
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
clock-frequency = <1196000000>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
clock-frequency = <1196000000>;
};
};
gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xf0001000 0x1000>,
<0xf0000100 0x100>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
<0 56 IRQ_TYPE_LEVEL_HIGH>;
};
cmt1: timer@e6138000 {
compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
reg = <0xe6138000 0x200>;
interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
renesas,channels-mask = <0x3f>;
status = "disabled";
};
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900000 4>,
<0xe6900010 4>,
<0xe6900020 1>,
<0xe6900040 1>,
<0xe6900060 1>;
interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
0 2 IRQ_TYPE_LEVEL_HIGH
0 3 IRQ_TYPE_LEVEL_HIGH
0 4 IRQ_TYPE_LEVEL_HIGH
0 5 IRQ_TYPE_LEVEL_HIGH
0 6 IRQ_TYPE_LEVEL_HIGH
0 7 IRQ_TYPE_LEVEL_HIGH
0 8 IRQ_TYPE_LEVEL_HIGH>;
};
irqpin1: irqpin@e6900004 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900004 4>,
<0xe6900014 4>,
<0xe6900024 1>,
<0xe6900044 1>,
<0xe6900064 1>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
0 10 IRQ_TYPE_LEVEL_HIGH
0 11 IRQ_TYPE_LEVEL_HIGH
0 12 IRQ_TYPE_LEVEL_HIGH
0 13 IRQ_TYPE_LEVEL_HIGH
0 14 IRQ_TYPE_LEVEL_HIGH
0 15 IRQ_TYPE_LEVEL_HIGH
0 16 IRQ_TYPE_LEVEL_HIGH>;
control-parent;
};
irqpin2: irqpin@e6900008 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900008 4>,
<0xe6900018 4>,
<0xe6900028 1>,
<0xe6900048 1>,
<0xe6900068 1>;
interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
0 18 IRQ_TYPE_LEVEL_HIGH
0 19 IRQ_TYPE_LEVEL_HIGH
0 20 IRQ_TYPE_LEVEL_HIGH
0 21 IRQ_TYPE_LEVEL_HIGH
0 22 IRQ_TYPE_LEVEL_HIGH
0 23 IRQ_TYPE_LEVEL_HIGH
0 24 IRQ_TYPE_LEVEL_HIGH>;
};
irqpin3: irqpin@e690000c {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe690000c 4>,
<0xe690001c 4>,
<0xe690002c 1>,
<0xe690004c 1>,
<0xe690006c 1>;
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
0 26 IRQ_TYPE_LEVEL_HIGH
0 27 IRQ_TYPE_LEVEL_HIGH
0 28 IRQ_TYPE_LEVEL_HIGH
0 29 IRQ_TYPE_LEVEL_HIGH
0 30 IRQ_TYPE_LEVEL_HIGH
0 31 IRQ_TYPE_LEVEL_HIGH
0 32 IRQ_TYPE_LEVEL_HIGH>;
};
i2c0: i2c@e6820000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0xe6820000 0x425>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
0 168 IRQ_TYPE_LEVEL_HIGH
0 169 IRQ_TYPE_LEVEL_HIGH
0 170 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c1: i2c@e6822000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0xe6822000 0x425>;
interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
0 52 IRQ_TYPE_LEVEL_HIGH
0 53 IRQ_TYPE_LEVEL_HIGH
0 54 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c2: i2c@e6824000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0xe6824000 0x425>;
interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
0 172 IRQ_TYPE_LEVEL_HIGH
0 173 IRQ_TYPE_LEVEL_HIGH
0 174 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c3: i2c@e6826000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0xe6826000 0x425>;
interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
0 184 IRQ_TYPE_LEVEL_HIGH
0 185 IRQ_TYPE_LEVEL_HIGH
0 186 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c4: i2c@e6828000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0xe6828000 0x425>;
interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
0 188 IRQ_TYPE_LEVEL_HIGH
0 189 IRQ_TYPE_LEVEL_HIGH
0 190 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif: mmc@e6bd0000 {
compatible = "renesas,sh-mmcif";
reg = <0xe6bd0000 0x100>;
interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
0 141 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-sh73a0";
reg = <0xee100000 0x100>;
interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
0 84 IRQ_TYPE_LEVEL_HIGH
0 85 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-sh73a0";
reg = <0xee120000 0x100>;
interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
0 89 IRQ_TYPE_LEVEL_HIGH>;
toshiba,mmc-wrprotect-disable;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-sh73a0";
reg = <0xee140000 0x100>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
0 105 IRQ_TYPE_LEVEL_HIGH>;
toshiba,mmc-wrprotect-disable;
cap-sd-highspeed;
status = "disabled";
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c40000 0x100>;
interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa1: serial@e6c50000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c50000 0x100>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa2: serial@e6c60000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c60000 0x100>;
interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa3: serial@e6c70000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c70000 0x100>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa4: serial@e6c80000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c80000 0x100>;
interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa5: serial@e6cb0000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6cb0000 0x100>;
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa6: serial@e6cc0000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6cc0000 0x100>;
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa7: serial@e6cd0000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6cd0000 0x100>;
interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb8: serial@e6c30000 {
compatible = "renesas,scifb-sh73a0", "renesas,scifb";
reg = <0xe6c30000 0x100>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-sh73a0";
reg = <0xe6050000 0x8000>,
<0xe605801c 0x1c>;
gpio-controller;
#gpio-cells = <2>;
interrupts-extended =
<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
};
sh_fsi2: sound@ec230000 {
#sound-dai-cells = <1>;
compatible = "renesas,sh_fsi2";
reg = <0xec230000 0x400>;
interrupts = <0 146 0x4>;
status = "disabled";
};
};