forked from Minki/linux
92b913b08b
The current orion5x board ->map_irq() routines check whether a given bus number lives on the PCIe controller by comparing it with the PCIe controller's primary bus number. This doesn't work in case there are multiple buses in the PCIe domain, i.e. if there exists a PCIe bridge on the primary PCIe bus. This patch adds a helper function (orion5x_pci_map_irq()) that returns the IRQ number for the given PCI device if that device has a hard-wired IRQ, or -1 otherwise, and makes each board's ->map_irq() function use this helper function. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
446 lines
11 KiB
C
446 lines
11 KiB
C
/*
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* QNAP TS-109/TS-209 Board Setup
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*
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* Maintainer: Byron Bradley <byron.bbradley@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/i2c.h>
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#include <linux/serial_reg.h>
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#include <linux/ata_platform.h>
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#include <asm/mach-types.h>
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#include <asm/gpio.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include <asm/arch/orion5x.h>
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#include "common.h"
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#define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
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#define QNAP_TS209_NOR_BOOT_SIZE SZ_8M
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/****************************************************************************
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* 8MiB NOR flash. The struct mtd_partition is not in the same order as the
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* partitions on the device because we want to keep compatability with
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* existing QNAP firmware.
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*
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* Layout as used by QNAP:
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* [2] 0x00000000-0x00200000 : "Kernel"
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* [3] 0x00200000-0x00600000 : "RootFS1"
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* [4] 0x00600000-0x00700000 : "RootFS2"
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* [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
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* [5] 0x00760000-0x00780000 : "U-Boot Config"
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* [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
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***************************************************************************/
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static struct mtd_partition qnap_ts209_partitions[] = {
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{
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.name = "U-Boot",
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.size = 0x00080000,
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.offset = 0x00780000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "Kernel",
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.size = 0x00200000,
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.offset = 0,
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}, {
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.name = "RootFS1",
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.size = 0x00400000,
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.offset = 0x00200000,
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}, {
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.name = "RootFS2",
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.size = 0x00100000,
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.offset = 0x00600000,
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}, {
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.name = "U-Boot Config",
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.size = 0x00020000,
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.offset = 0x00760000,
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}, {
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.name = "NAS Config",
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.size = 0x00060000,
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.offset = 0x00700000,
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.mask_flags = MTD_WRITEABLE,
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}
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};
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static struct physmap_flash_data qnap_ts209_nor_flash_data = {
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.width = 1,
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.parts = qnap_ts209_partitions,
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.nr_parts = ARRAY_SIZE(qnap_ts209_partitions)
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};
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static struct resource qnap_ts209_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = QNAP_TS209_NOR_BOOT_BASE,
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.end = QNAP_TS209_NOR_BOOT_BASE + QNAP_TS209_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device qnap_ts209_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = { .platform_data = &qnap_ts209_nor_flash_data, },
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.resource = &qnap_ts209_nor_flash_resource,
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.num_resources = 1,
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};
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/*****************************************************************************
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* PCI
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****************************************************************************/
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#define QNAP_TS209_PCI_SLOT0_OFFS 7
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#define QNAP_TS209_PCI_SLOT0_IRQ_PIN 6
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#define QNAP_TS209_PCI_SLOT1_IRQ_PIN 7
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void __init qnap_ts209_pci_preinit(void)
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{
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int pin;
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/*
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* Configure PCI GPIO IRQ pins
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*/
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pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
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if (gpio_request(pin, "PCI Int1") == 0) {
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if (gpio_direction_input(pin) == 0) {
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set_irq_type(gpio_to_irq(pin), IRQT_LOW);
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
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"set_irq_type pin %d\n", pin);
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gpio_free(pin);
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}
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request "
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"%d\n", pin);
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}
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pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
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if (gpio_request(pin, "PCI Int2") == 0) {
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if (gpio_direction_input(pin) == 0) {
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set_irq_type(gpio_to_irq(pin), IRQT_LOW);
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed "
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"to set_irq_type pin %d\n", pin);
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gpio_free(pin);
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}
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request "
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"%d\n", pin);
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}
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}
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static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq;
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/*
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* Check for devices with hard-wired IRQs.
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*/
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irq = orion5x_pci_map_irq(dev, slot, pin);
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if (irq != -1)
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return irq;
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/*
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* PCI IRQs are connected via GPIOs.
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*/
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switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) {
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case 0:
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return gpio_to_irq(QNAP_TS209_PCI_SLOT0_IRQ_PIN);
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case 1:
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return gpio_to_irq(QNAP_TS209_PCI_SLOT1_IRQ_PIN);
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default:
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return -1;
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}
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}
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static struct hw_pci qnap_ts209_pci __initdata = {
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.nr_controllers = 2,
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.preinit = qnap_ts209_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = orion5x_pci_sys_setup,
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.scan = orion5x_pci_sys_scan_bus,
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.map_irq = qnap_ts209_pci_map_irq,
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};
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static int __init qnap_ts209_pci_init(void)
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{
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if (machine_is_ts_x09())
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pci_common_init(&qnap_ts209_pci);
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return 0;
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}
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subsys_initcall(qnap_ts209_pci_init);
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/*****************************************************************************
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* Ethernet
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****************************************************************************/
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static struct mv643xx_eth_platform_data qnap_ts209_eth_data = {
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.phy_addr = 8,
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.force_phy_addr = 1,
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};
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static int __init parse_hex_nibble(char n)
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{
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if (n >= '0' && n <= '9')
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return n - '0';
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if (n >= 'A' && n <= 'F')
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return n - 'A' + 10;
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if (n >= 'a' && n <= 'f')
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return n - 'a' + 10;
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return -1;
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}
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static int __init parse_hex_byte(const char *b)
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{
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int hi;
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int lo;
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hi = parse_hex_nibble(b[0]);
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lo = parse_hex_nibble(b[1]);
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if (hi < 0 || lo < 0)
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return -1;
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return (hi << 4) | lo;
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}
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static int __init check_mac_addr(const char *addr_str)
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{
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u_int8_t addr[6];
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int i;
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for (i = 0; i < 6; i++) {
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int byte;
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/*
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* Enforce "xx:xx:xx:xx:xx:xx\n" format.
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*/
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if (addr_str[(i * 3) + 2] != ((i < 5) ? ':' : '\n'))
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return -1;
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byte = parse_hex_byte(addr_str + (i * 3));
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if (byte < 0)
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return -1;
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addr[i] = byte;
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}
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printk(KERN_INFO "ts209: found ethernet mac address ");
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for (i = 0; i < 6; i++)
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printk("%.2x%s", addr[i], (i < 5) ? ":" : ".\n");
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memcpy(qnap_ts209_eth_data.mac_addr, addr, 6);
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return 0;
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}
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/*
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* The 'NAS Config' flash partition has an ext2 filesystem which
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* contains a file that has the ethernet MAC address in plain text
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* (format "xx:xx:xx:xx:xx:xx\n".)
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*/
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static void __init ts209_find_mac_addr(void)
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{
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unsigned long addr;
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for (addr = 0x00700000; addr < 0x00760000; addr += 1024) {
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char *nor_page;
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int ret = 0;
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nor_page = ioremap(QNAP_TS209_NOR_BOOT_BASE + addr, 1024);
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if (nor_page != NULL) {
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ret = check_mac_addr(nor_page);
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iounmap(nor_page);
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}
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if (ret == 0)
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break;
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}
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}
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/*****************************************************************************
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* RTC S35390A on I2C bus
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****************************************************************************/
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#define TS209_RTC_GPIO 3
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static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = {
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.driver_name = "rtc-s35390a",
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.addr = 0x30,
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.irq = 0,
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};
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/****************************************************************************
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* GPIO Attached Keys
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* Power button is attached to the PIC microcontroller
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****************************************************************************/
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#define QNAP_TS209_GPIO_KEY_MEDIA 1
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#define QNAP_TS209_GPIO_KEY_RESET 2
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static struct gpio_keys_button qnap_ts209_buttons[] = {
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{
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.code = KEY_RESTART,
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.gpio = QNAP_TS209_GPIO_KEY_MEDIA,
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.desc = "USB Copy Button",
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.active_low = 1,
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},
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{
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.code = KEY_POWER,
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.gpio = QNAP_TS209_GPIO_KEY_RESET,
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.desc = "Reset Button",
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.active_low = 1,
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}
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};
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static struct gpio_keys_platform_data qnap_ts209_button_data = {
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.buttons = qnap_ts209_buttons,
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.nbuttons = ARRAY_SIZE(qnap_ts209_buttons),
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};
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static struct platform_device qnap_ts209_button_device = {
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.name = "gpio-keys",
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.id = -1,
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.num_resources = 0,
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.dev = { .platform_data = &qnap_ts209_button_data, },
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};
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/*****************************************************************************
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* SATA
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****************************************************************************/
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static struct mv_sata_platform_data qnap_ts209_sata_data = {
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.n_ports = 2,
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};
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/*****************************************************************************
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* General Setup
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****************************************************************************/
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static struct platform_device *qnap_ts209_devices[] __initdata = {
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&qnap_ts209_nor_flash,
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&qnap_ts209_button_device,
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};
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/*
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* QNAP TS-[12]09 specific power off method via UART1-attached PIC
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*/
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#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2))
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static void qnap_ts209_power_off(void)
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{
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/* 19200 baud divisor */
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const unsigned divisor = ((ORION5X_TCLK + (8 * 19200)) / (16 * 19200));
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pr_info("%s: triggering power-off...\n", __func__);
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/* hijack uart1 and reset into sane state (19200,8n1) */
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orion5x_write(UART1_REG(LCR), 0x83);
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orion5x_write(UART1_REG(DLL), divisor & 0xff);
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orion5x_write(UART1_REG(DLM), (divisor >> 8) & 0xff);
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orion5x_write(UART1_REG(LCR), 0x03);
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orion5x_write(UART1_REG(IER), 0x00);
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orion5x_write(UART1_REG(FCR), 0x00);
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orion5x_write(UART1_REG(MCR), 0x00);
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/* send the power-off command 'A' to PIC */
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orion5x_write(UART1_REG(TX), 'A');
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}
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static void __init qnap_ts209_init(void)
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{
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/*
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* Setup basic Orion functions. Need to be called early.
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*/
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orion5x_init();
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/*
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* Setup flash mapping
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*/
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orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE,
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QNAP_TS209_NOR_BOOT_SIZE);
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/*
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* Open a special address decode windows for the PCIE WA.
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*/
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orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
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ORION5X_PCIE_WA_SIZE);
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/*
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* Setup Multiplexing Pins --
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* MPP[0] Reserved
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* MPP[1] USB copy button (0 active)
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* MPP[2] Load defaults button (0 active)
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* MPP[3] GPIO RTC
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* MPP[4-5] Reserved
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* MPP[6] PCI Int A
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* MPP[7] PCI Int B
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* MPP[8-11] Reserved
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* MPP[12] SATA 0 presence
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* MPP[13] SATA 1 presence
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* MPP[14] SATA 0 active
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* MPP[15] SATA 1 active
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* MPP[16] UART1 RXD
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* MPP[17] UART1 TXD
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* MPP[18] SW_RST (0 active)
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* MPP[19] Reserved
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* MPP[20] PCI clock 0
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* MPP[21] PCI clock 1
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* MPP[22] USB 0 over current
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* MPP[23-25] Reserved
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*/
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orion5x_write(MPP_0_7_CTRL, 0x3);
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orion5x_write(MPP_8_15_CTRL, 0x55550000);
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orion5x_write(MPP_16_19_CTRL, 0x5500);
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orion5x_gpio_set_valid_pins(0x3cc0fff);
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/* register ts209 specific power-off method */
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pm_power_off = qnap_ts209_power_off;
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platform_add_devices(qnap_ts209_devices,
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ARRAY_SIZE(qnap_ts209_devices));
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/* Get RTC IRQ and register the chip */
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if (gpio_request(TS209_RTC_GPIO, "rtc") == 0) {
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if (gpio_direction_input(TS209_RTC_GPIO) == 0)
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qnap_ts209_i2c_rtc.irq = gpio_to_irq(TS209_RTC_GPIO);
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else
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gpio_free(TS209_RTC_GPIO);
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}
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if (qnap_ts209_i2c_rtc.irq == 0)
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pr_warning("qnap_ts209_init: failed to get RTC IRQ\n");
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i2c_register_board_info(0, &qnap_ts209_i2c_rtc, 1);
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ts209_find_mac_addr();
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orion5x_eth_init(&qnap_ts209_eth_data);
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orion5x_sata_init(&qnap_ts209_sata_data);
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}
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MACHINE_START(TS209, "QNAP TS-109/TS-209")
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/* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */
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.phys_io = ORION5X_REGS_PHYS_BASE,
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.io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
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.boot_params = 0x00000100,
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.init_machine = qnap_ts209_init,
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.map_io = orion5x_map_io,
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.init_irq = orion5x_init_irq,
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.timer = &orion5x_timer,
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.fixup = tag_fixup_mem32,
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MACHINE_END
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