emac_mac_start() uses information from the external PHY to program the MAC, so it makes no sense to call it before the link is up. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			248 lines
		
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			248 lines
		
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 and
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|  * only version 2 as published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  */
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| 
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| /* EMAC DMA HW engine uses three rings:
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|  * Tx:
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|  *   TPD: Transmit Packet Descriptor ring.
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|  * Rx:
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|  *   RFD: Receive Free Descriptor ring.
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|  *     Ring of descriptors with empty buffers to be filled by Rx HW.
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|  *   RRD: Receive Return Descriptor ring.
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|  *     Ring of descriptors with buffers filled with received data.
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|  */
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| 
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| #ifndef _EMAC_HW_H_
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| #define _EMAC_HW_H_
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| 
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| /* EMAC_CSR register offsets */
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| #define EMAC_EMAC_WRAPPER_CSR1                                0x000000
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| #define EMAC_EMAC_WRAPPER_CSR2                                0x000004
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| #define EMAC_EMAC_WRAPPER_TX_TS_LO                            0x000104
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| #define EMAC_EMAC_WRAPPER_TX_TS_HI                            0x000108
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| #define EMAC_EMAC_WRAPPER_TX_TS_INX                           0x00010c
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| 
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| /* DMA Order Settings */
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| enum emac_dma_order {
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| 	emac_dma_ord_in = 1,
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| 	emac_dma_ord_enh = 2,
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| 	emac_dma_ord_out = 4
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| };
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| 
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| enum emac_dma_req_block {
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| 	emac_dma_req_128 = 0,
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| 	emac_dma_req_256 = 1,
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| 	emac_dma_req_512 = 2,
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| 	emac_dma_req_1024 = 3,
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| 	emac_dma_req_2048 = 4,
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| 	emac_dma_req_4096 = 5
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| };
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| 
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| /* Returns the value of bits idx...idx+n_bits */
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| #define BITS_GET(val, lo, hi) ((le32_to_cpu(val) & GENMASK((hi), (lo))) >> lo)
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| #define BITS_SET(val, lo, hi, new_val) \
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| 	val = cpu_to_le32((le32_to_cpu(val) & (~GENMASK((hi), (lo)))) |	\
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| 		(((new_val) << (lo)) & GENMASK((hi), (lo))))
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| 
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| /* RRD (Receive Return Descriptor) */
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| struct emac_rrd {
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| 	u32	word[6];
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| 
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| /* number of RFD */
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| #define RRD_NOR(rrd)			BITS_GET((rrd)->word[0], 16, 19)
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| /* start consumer index of rfd-ring */
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| #define RRD_SI(rrd)			BITS_GET((rrd)->word[0], 20, 31)
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| /* vlan-tag (CVID, CFI and PRI) */
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| #define RRD_CVALN_TAG(rrd)		BITS_GET((rrd)->word[2], 0, 15)
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| /* length of the packet */
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| #define RRD_PKT_SIZE(rrd)		BITS_GET((rrd)->word[3], 0, 13)
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| /* L4(TCP/UDP) checksum failed */
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| #define RRD_L4F(rrd)			BITS_GET((rrd)->word[3], 14, 14)
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| /* vlan tagged */
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| #define RRD_CVTAG(rrd)			BITS_GET((rrd)->word[3], 16, 16)
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| /* When set, indicates that the descriptor is updated by the IP core.
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|  * When cleared, indicates that the descriptor is invalid.
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|  */
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| #define RRD_UPDT(rrd)			BITS_GET((rrd)->word[3], 31, 31)
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| #define RRD_UPDT_SET(rrd, val)		BITS_SET((rrd)->word[3], 31, 31, val)
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| /* timestamp low */
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| #define RRD_TS_LOW(rrd)			BITS_GET((rrd)->word[4], 0, 29)
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| /* timestamp high */
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| #define RRD_TS_HI(rrd)			le32_to_cpu((rrd)->word[5])
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| };
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| 
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| /* TPD (Transmit Packet Descriptor) */
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| struct emac_tpd {
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| 	u32				word[4];
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| 
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| /* Number of bytes of the transmit packet. (include 4-byte CRC) */
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| #define TPD_BUF_LEN_SET(tpd, val)	BITS_SET((tpd)->word[0], 0, 15, val)
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| /* Custom Checksum Offload: When set, ask IP core to offload custom checksum */
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| #define TPD_CSX_SET(tpd, val)		BITS_SET((tpd)->word[1], 8, 8, val)
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| /* TCP Large Send Offload: When set, ask IP core to do offload TCP Large Send */
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| #define TPD_LSO(tpd)			BITS_GET((tpd)->word[1], 12, 12)
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| #define TPD_LSO_SET(tpd, val)		BITS_SET((tpd)->word[1], 12, 12, val)
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| /*  Large Send Offload Version: When set, indicates this is an LSOv2
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|  * (for both IPv4 and IPv6). When cleared, indicates this is an LSOv1
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|  * (only for IPv4).
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|  */
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| #define TPD_LSOV_SET(tpd, val)		BITS_SET((tpd)->word[1], 13, 13, val)
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| /* IPv4 packet: When set, indicates this is an  IPv4 packet, this bit is only
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|  * for LSOV2 format.
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|  */
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| #define TPD_IPV4_SET(tpd, val)		BITS_SET((tpd)->word[1], 16, 16, val)
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| /* 0: Ethernet   frame (DA+SA+TYPE+DATA+CRC)
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|  * 1: IEEE 802.3 frame (DA+SA+LEN+DSAP+SSAP+CTL+ORG+TYPE+DATA+CRC)
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|  */
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| #define TPD_TYP_SET(tpd, val)		BITS_SET((tpd)->word[1], 17, 17, val)
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| /* Low-32bit Buffer Address */
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| #define TPD_BUFFER_ADDR_L_SET(tpd, val)	((tpd)->word[2] = cpu_to_le32(val))
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| /* CVLAN Tag to be inserted if INS_VLAN_TAG is set, CVLAN TPID based on global
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|  * register configuration.
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|  */
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| #define TPD_CVLAN_TAG_SET(tpd, val)	BITS_SET((tpd)->word[3], 0, 15, val)
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| /*  Insert CVlan Tag: When set, ask MAC to insert CVLAN TAG to outgoing packet
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|  */
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| #define TPD_INSTC_SET(tpd, val)		BITS_SET((tpd)->word[3], 17, 17, val)
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| /* High-14bit Buffer Address, So, the 64b-bit address is
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|  * {DESC_CTRL_11_TX_DATA_HIADDR[17:0],(register) BUFFER_ADDR_H, BUFFER_ADDR_L}
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|  */
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| #define TPD_BUFFER_ADDR_H_SET(tpd, val)	BITS_SET((tpd)->word[3], 18, 30, val)
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| /* Format D. Word offset from the 1st byte of this packet to start to calculate
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|  * the custom checksum.
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|  */
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| #define TPD_PAYLOAD_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val)
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| /*  Format D. Word offset from the 1st byte of this packet to fill the custom
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|  * checksum to
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|  */
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| #define TPD_CXSUM_OFFSET_SET(tpd, val)	BITS_SET((tpd)->word[1], 18, 25, val)
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| 
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| /* Format C. TCP Header offset from the 1st byte of this packet. (byte unit) */
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| #define TPD_TCPHDR_OFFSET_SET(tpd, val)	BITS_SET((tpd)->word[1], 0, 7, val)
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| /* Format C. MSS (Maximum Segment Size) got from the protocol layer. (byte unit)
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|  */
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| #define TPD_MSS_SET(tpd, val)		BITS_SET((tpd)->word[1], 18, 30, val)
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| /* packet length in ext tpd */
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| #define TPD_PKT_LEN_SET(tpd, val)	((tpd)->word[2] = cpu_to_le32(val))
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| };
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| 
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| /* emac_ring_header represents a single, contiguous block of DMA space
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|  * mapped for the three descriptor rings (tpd, rfd, rrd)
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|  */
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| struct emac_ring_header {
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| 	void			*v_addr;	/* virtual address */
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| 	dma_addr_t		dma_addr;	/* dma address */
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| 	size_t			size;		/* length in bytes */
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| 	size_t			used;
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| };
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| 
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| /* emac_buffer is wrapper around a pointer to a socket buffer
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|  * so a DMA handle can be stored along with the skb
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|  */
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| struct emac_buffer {
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| 	struct sk_buff		*skb;		/* socket buffer */
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| 	u16			length;		/* rx buffer length */
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| 	dma_addr_t		dma_addr;	/* dma address */
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| };
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| 
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| /* receive free descriptor (rfd) ring */
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| struct emac_rfd_ring {
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| 	struct emac_buffer	*rfbuff;
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| 	u32			*v_addr;	/* virtual address */
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| 	dma_addr_t		dma_addr;	/* dma address */
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| 	size_t			size;		/* length in bytes */
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| 	unsigned int		count;		/* number of desc in the ring */
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| 	unsigned int		produce_idx;
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| 	unsigned int		process_idx;
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| 	unsigned int		consume_idx;	/* unused */
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| };
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| 
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| /* Receive Return Desciptor (RRD) ring */
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| struct emac_rrd_ring {
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| 	u32			*v_addr;	/* virtual address */
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| 	dma_addr_t		dma_addr;	/* physical address */
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| 	size_t			size;		/* length in bytes */
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| 	unsigned int		count;		/* number of desc in the ring */
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| 	unsigned int		produce_idx;	/* unused */
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| 	unsigned int		consume_idx;
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| };
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| 
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| /* Rx queue */
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| struct emac_rx_queue {
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| 	struct net_device	*netdev;	/* netdev ring belongs to */
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| 	struct emac_rrd_ring	rrd;
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| 	struct emac_rfd_ring	rfd;
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| 	struct napi_struct	napi;
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| 	struct emac_irq		*irq;
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| 
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| 	u32			intr;
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| 	u32			produce_mask;
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| 	u32			process_mask;
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| 	u32			consume_mask;
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| 
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| 	u16			produce_reg;
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| 	u16			process_reg;
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| 	u16			consume_reg;
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| 
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| 	u8			produce_shift;
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| 	u8			process_shft;
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| 	u8			consume_shift;
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| };
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| 
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| /* Transimit Packet Descriptor (tpd) ring */
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| struct emac_tpd_ring {
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| 	struct emac_buffer	*tpbuff;
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| 	u32			*v_addr;	/* virtual address */
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| 	dma_addr_t		dma_addr;	/* dma address */
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| 
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| 	size_t			size;		/* length in bytes */
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| 	unsigned int		count;		/* number of desc in the ring */
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| 	unsigned int		produce_idx;
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| 	unsigned int		consume_idx;
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| 	unsigned int		last_produce_idx;
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| };
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| 
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| /* Tx queue */
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| struct emac_tx_queue {
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| 	struct emac_tpd_ring	tpd;
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| 
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| 	u32			produce_mask;
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| 	u32			consume_mask;
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| 
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| 	u16			max_packets;	/* max packets per interrupt */
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| 	u16			produce_reg;
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| 	u16			consume_reg;
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| 
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| 	u8			produce_shift;
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| 	u8			consume_shift;
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| };
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| 
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| struct emac_adapter;
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| 
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| int  emac_mac_up(struct emac_adapter *adpt);
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| void emac_mac_down(struct emac_adapter *adpt);
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| void emac_mac_reset(struct emac_adapter *adpt);
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| void emac_mac_stop(struct emac_adapter *adpt);
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| void emac_mac_mode_config(struct emac_adapter *adpt);
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| void emac_mac_rx_process(struct emac_adapter *adpt, struct emac_rx_queue *rx_q,
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| 			 int *num_pkts, int max_pkts);
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| int emac_mac_tx_buf_send(struct emac_adapter *adpt, struct emac_tx_queue *tx_q,
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| 			 struct sk_buff *skb);
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| void emac_mac_tx_process(struct emac_adapter *adpt, struct emac_tx_queue *tx_q);
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| void emac_mac_rx_tx_ring_init_all(struct platform_device *pdev,
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| 				  struct emac_adapter *adpt);
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| int  emac_mac_rx_tx_rings_alloc_all(struct emac_adapter *adpt);
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| void emac_mac_rx_tx_rings_free_all(struct emac_adapter *adpt);
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| void emac_mac_multicast_addr_clear(struct emac_adapter *adpt);
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| void emac_mac_multicast_addr_set(struct emac_adapter *adpt, u8 *addr);
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| 
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| #endif /*_EMAC_HW_H_*/
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