Omar Ramirez Luna 90f1380ef6 ARM: OMAP2+: control: new APIs to configure boot address and mode ... SCM contains boot addr and boot mode registers to control other processors on different OMAP versions. It controls the boot address and mode for DSP based subsystems like: IVA 2.1 (OMAP2430), IVA 2.2 (OMAP3) and DSP (OMAP4). If contained within SCM registers, when a processor is booting it uses BOOTADDR to start running the code at that location. BOOTMOD register specifies a different set of modes for the processor to execute when booting (from direct, idle, self-loop, user and default). Since there was no offset associated with OMAP4, this patch defines it. Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org> Signed-off-by: Paul Walmsley <paul@pwsan.com>		2012-06-18 16:18:09 -06:00
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mach	ARM: OMAP2+: control: new APIs to configure boot address and mode	2012-06-18 16:18:09 -06:00