forked from Minki/linux
d0d7a6fe42
Add a document to describe Andestech atcpit100 timer and binding information. Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
34 lines
1.0 KiB
Plaintext
34 lines
1.0 KiB
Plaintext
Andestech ATCPIT100 timer
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ATCPIT100 is a generic IP block from Andes Technology, embedded in
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Andestech AE3XX platforms and other designs.
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This timer is a set of compact multi-function timers, which can be
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used as pulse width modulators (PWM) as well as simple timers.
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It supports up to 4 PIT channels. Each PIT channel is a
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multi-function timer and provide the following usage scenarios:
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One 32-bit timer
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Two 16-bit timers
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Four 8-bit timers
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One 16-bit PWM
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One 16-bit timer and one 8-bit PWM
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Two 8-bit timer and one 8-bit PWM
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Required properties:
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- compatible : Should be "andestech,atcpit100"
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- reg : Address and length of the register set
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- interrupts : Reference to the timer interrupt
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- clocks : a clock to provide the tick rate for "andestech,atcpit100"
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- clock-names : should be "PCLK" for the peripheral clock source.
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Examples:
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timer0: timer@f0400000 {
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compatible = "andestech,atcpit100";
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reg = <0xf0400000 0x1000>;
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interrupts = <2>;
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clocks = <&apb>;
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clock-names = "PCLK";
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};
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