forked from Minki/linux
50454acaac
Add devicetree binding for Actions Semi Owl SoCs DMA controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
48 lines
1.7 KiB
Plaintext
48 lines
1.7 KiB
Plaintext
* Actions Semi Owl SoCs DMA controller
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This binding follows the generic DMA bindings defined in dma.txt.
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Required properties:
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- compatible: Should be "actions,s900-dma".
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- reg: Should contain DMA registers location and length.
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- interrupts: Should contain 4 interrupts shared by all channel.
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- #dma-cells: Must be <1>. Used to represent the number of integer
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cells in the dmas property of client device.
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- dma-channels: Physical channels supported.
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- dma-requests: Number of DMA request signals supported by the controller.
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Refer to Documentation/devicetree/bindings/dma/dma.txt
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- clocks: Phandle and Specifier of the clock feeding the DMA controller.
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Example:
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Controller:
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dma: dma-controller@e0260000 {
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compatible = "actions,s900-dma";
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reg = <0x0 0xe0260000 0x0 0x1000>;
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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dma-channels = <12>;
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dma-requests = <46>;
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clocks = <&clock CLK_DMAC>;
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};
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Client:
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DMA clients connected to the Actions Semi Owl SoCs DMA controller must
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use the format described in the dma.txt file, using a two-cell specifier
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for each channel.
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The two cells in order are:
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1. A phandle pointing to the DMA controller.
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2. The channel id.
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uart5: serial@e012a000 {
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...
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dma-names = "tx", "rx";
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dmas = <&dma 26>, <&dma 27>;
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...
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};
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