Will Deacon 905e8c5dca arm64: errata: add workaround for cortex-a53 erratum #845719 ... When running a compat (AArch32) userspace on Cortex-A53, a load at EL0 from a virtual address that matches the bottom 32 bits of the virtual address used by a recent load at (AArch64) EL1 might return incorrect data. This patch works around the issue by writing to the contextidr_el1 register on the exception return path when returning to a 32-bit task. This workaround is patched in at runtime based on the MIDR value of the processor. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>		2015-04-01 10:24:31 +01:00
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asm	arm64: errata: add workaround for cortex-a53 erratum #845719	2015-04-01 10:24:31 +01:00
uapi/asm	Fairly small update, but there are some interesting new features.	2015-02-13 09:55:09 -08:00