forked from Minki/linux
9ed76e0336
This patch adds MDMA platform data and enables MDMA for DMA memcpy operation for EXYNOS SoCs. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
154 lines
3.6 KiB
C
154 lines
3.6 KiB
C
/* linux/arch/arm/mach-exynos4/dma.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/pl330.h>
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#include <linux/of.h>
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#include <asm/irq.h>
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#include <plat/devs.h>
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#include <plat/irqs.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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#include <mach/dma.h>
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static u64 dma_dmamask = DMA_BIT_MASK(32);
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static u8 pdma0_peri[] = {
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DMACH_PCM0_RX,
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DMACH_PCM0_TX,
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DMACH_PCM2_RX,
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DMACH_PCM2_TX,
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DMACH_MSM_REQ0,
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DMACH_MSM_REQ2,
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DMACH_SPI0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI2_RX,
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DMACH_SPI2_TX,
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DMACH_I2S0S_TX,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S2_RX,
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DMACH_I2S2_TX,
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART4_RX,
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DMACH_UART4_TX,
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DMACH_SLIMBUS0_RX,
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DMACH_SLIMBUS0_TX,
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DMACH_SLIMBUS2_RX,
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DMACH_SLIMBUS2_TX,
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DMACH_SLIMBUS4_RX,
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DMACH_SLIMBUS4_TX,
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DMACH_AC97_MICIN,
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DMACH_AC97_PCMIN,
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DMACH_AC97_PCMOUT,
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};
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static struct dma_pl330_platdata exynos4_pdma0_pdata = {
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.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
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.peri_id = pdma0_peri,
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};
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static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330,
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EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata);
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static u8 pdma1_peri[] = {
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DMACH_PCM0_RX,
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DMACH_PCM0_TX,
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DMACH_PCM1_RX,
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DMACH_PCM1_TX,
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DMACH_MSM_REQ1,
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DMACH_MSM_REQ3,
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DMACH_SPI1_RX,
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DMACH_SPI1_TX,
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DMACH_I2S0S_TX,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S1_RX,
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DMACH_I2S1_TX,
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_SLIMBUS1_RX,
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DMACH_SLIMBUS1_TX,
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DMACH_SLIMBUS3_RX,
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DMACH_SLIMBUS3_TX,
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DMACH_SLIMBUS5_RX,
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DMACH_SLIMBUS5_TX,
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};
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static struct dma_pl330_platdata exynos4_pdma1_pdata = {
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.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
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.peri_id = pdma1_peri,
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};
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static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330,
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EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata);
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static u8 mdma_peri[] = {
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DMACH_MTOM_0,
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DMACH_MTOM_1,
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DMACH_MTOM_2,
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DMACH_MTOM_3,
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DMACH_MTOM_4,
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DMACH_MTOM_5,
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DMACH_MTOM_6,
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DMACH_MTOM_7,
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};
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static struct dma_pl330_platdata exynos4_mdma1_pdata = {
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.nr_valid_peri = ARRAY_SIZE(mdma_peri),
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.peri_id = mdma_peri,
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};
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static AMBA_AHB_DEVICE(exynos4_mdma1, "dma-pl330.2", 0x00041330,
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EXYNOS4_PA_MDMA1, {IRQ_MDMA1}, &exynos4_mdma1_pdata);
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static int __init exynos4_dma_init(void)
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{
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if (of_have_populated_dt())
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return 0;
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dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
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amba_device_register(&exynos4_pdma0_device, &iomem_resource);
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dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
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amba_device_register(&exynos4_pdma1_device, &iomem_resource);
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dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask);
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amba_device_register(&exynos4_mdma1_device, &iomem_resource);
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return 0;
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}
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arch_initcall(exynos4_dma_init);
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