de0f938739
As Linux kernel separates KERNEL and USER address spaces, there is therefore no need to flag USER access at page level. Today, the 8xx TLB handlers already handle user access in the L1 entry through Access Protection Groups, it is then natural to move the user access handling at PMD level once _PAGE_NA allows to handle PAGE_NONE protection without _PAGE_USER In the mean time, as we free up one bit in the PTE, we can use it to include SPS (page size flag) in the PTE and avoid handling it at every TLB miss hence removing special handling based on compiled page size. For _PAGE_EXEC, we rework it to use PP PTE bits, avoiding the copy of _PAGE_EXEC bit into the L1 entry. Unfortunatly we are not able to put it at the correct location as it conflicts with NA/RO/RW bits for data entries. Upper bits of APG in L1 entry overlap with PMD base address. In order to avoid having to filter that out, we set up all groups so that upper bits can have any value. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
145 lines
4.0 KiB
C
145 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_PGALLOC_32_H
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#define _ASM_POWERPC_PGALLOC_32_H
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#include <linux/threads.h>
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#include <linux/slab.h>
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/*
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* Functions that deal with pagetables that could be at any level of
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* the table need to be passed an "index_size" so they know how to
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* handle allocation. For PTE pages (which are linked to a struct
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* page for now, and drawn from the main get_free_pages() pool), the
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* allocation size will be (2^index_size * sizeof(pointer)) and
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* allocations are drawn from the kmem_cache in PGT_CACHE(index_size).
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*
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* The maximum index size needs to be big enough to allow any
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* pagetable sizes we need, but small enough to fit in the low bits of
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* any page table pointer. In other words all pagetables, even tiny
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* ones, must be aligned to allow at least enough low 0 bits to
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* contain this value. This value is also used as a mask, so it must
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* be one less than a power of two.
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*/
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#define MAX_PGTABLE_INDEX_SIZE 0xf
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extern void __bad_pte(pmd_t *pmd);
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extern struct kmem_cache *pgtable_cache[];
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#define PGT_CACHE(shift) ({ \
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BUG_ON(!(shift)); \
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pgtable_cache[(shift) - 1]; \
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})
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static inline pgd_t *pgd_alloc(struct mm_struct *mm)
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{
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return kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),
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pgtable_gfp_flags(mm, GFP_KERNEL));
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}
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static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
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{
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kmem_cache_free(PGT_CACHE(PGD_INDEX_SIZE), pgd);
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}
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/*
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* We don't have any real pmd's, and this code never triggers because
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* the pgd will always be present..
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*/
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/* #define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); }) */
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#define pmd_free(mm, x) do { } while (0)
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#define __pmd_free_tlb(tlb,x,a) do { } while (0)
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/* #define pgd_populate(mm, pmd, pte) BUG() */
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#ifndef CONFIG_BOOKE
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static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
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pte_t *pte)
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{
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*pmdp = __pmd(__pa(pte) | _PMD_PRESENT);
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}
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static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
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pgtable_t pte_page)
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{
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*pmdp = __pmd((page_to_pfn(pte_page) << PAGE_SHIFT) | _PMD_USER |
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_PMD_PRESENT);
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}
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#define pmd_pgtable(pmd) pmd_page(pmd)
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#else
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static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
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pte_t *pte)
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{
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*pmdp = __pmd((unsigned long)pte | _PMD_PRESENT);
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}
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static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
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pgtable_t pte_page)
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{
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*pmdp = __pmd((unsigned long)lowmem_page_address(pte_page) | _PMD_PRESENT);
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}
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#define pmd_pgtable(pmd) pmd_page(pmd)
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#endif
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extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
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extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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free_page((unsigned long)pte);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
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{
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pgtable_page_dtor(ptepage);
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__free_page(ptepage);
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}
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static inline void pgtable_free(void *table, unsigned index_size)
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{
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if (!index_size) {
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free_page((unsigned long)table);
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} else {
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BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE);
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kmem_cache_free(PGT_CACHE(index_size), table);
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}
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}
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#define check_pgt_cache() do { } while (0)
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#ifdef CONFIG_SMP
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static inline void pgtable_free_tlb(struct mmu_gather *tlb,
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void *table, int shift)
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{
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unsigned long pgf = (unsigned long)table;
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BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
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pgf |= shift;
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tlb_remove_table(tlb, (void *)pgf);
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}
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static inline void __tlb_remove_table(void *_table)
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{
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void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
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unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
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pgtable_free(table, shift);
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}
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#else
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static inline void pgtable_free_tlb(struct mmu_gather *tlb,
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void *table, int shift)
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{
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pgtable_free(table, shift);
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}
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#endif
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static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
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unsigned long address)
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{
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tlb_flush_pgtable(tlb, address);
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pgtable_page_dtor(table);
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pgtable_free_tlb(tlb, page_address(table), 0);
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}
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#endif /* _ASM_POWERPC_PGALLOC_32_H */
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