forked from Minki/linux
ce548396a4
The soc_camera driver is about to be removed, so drop camera support from this board. Note that the soc_camera driver itself has long since been deprecated and can't be compiled anymore (it depends on BROKEN), so camera support on this board has been broken for a long time (at least since 4.6 when the omap1_camera.c was removed from soc_camera). Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
416 lines
9.4 KiB
C
416 lines
9.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* linux/arch/arm/mach-omap1/devices.c
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*
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* OMAP1 platform device setup/initialization
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*/
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/platform_data/omap-wd-timer.h>
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#include <asm/mach/map.h>
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#include <mach/tc.h>
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#include <mach/mux.h>
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#include <mach/omap7xx.h>
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#include <mach/hardware.h>
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#include "common.h"
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#include "clock.h"
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#include "mmc.h"
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#include "sram.h"
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#if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
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#define OMAP_RTC_BASE 0xfffb4800
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static struct resource rtc_resources[] = {
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{
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.start = OMAP_RTC_BASE,
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.end = OMAP_RTC_BASE + 0x5f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_RTC_TIMER,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = INT_RTC_ALARM,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device omap_rtc_device = {
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.name = "omap_rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(rtc_resources),
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.resource = rtc_resources,
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};
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static void omap_init_rtc(void)
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{
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(void) platform_device_register(&omap_rtc_device);
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}
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#else
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static inline void omap_init_rtc(void) {}
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#endif
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static inline void omap_init_mbox(void) { }
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/*-------------------------------------------------------------------------*/
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#if IS_ENABLED(CONFIG_MMC_OMAP)
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static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
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int controller_nr)
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{
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if (controller_nr == 0) {
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if (cpu_is_omap7xx()) {
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omap_cfg_reg(MMC_7XX_CMD);
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omap_cfg_reg(MMC_7XX_CLK);
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omap_cfg_reg(MMC_7XX_DAT0);
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} else {
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omap_cfg_reg(MMC_CMD);
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omap_cfg_reg(MMC_CLK);
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omap_cfg_reg(MMC_DAT0);
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}
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if (cpu_is_omap1710()) {
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omap_cfg_reg(M15_1710_MMC_CLKI);
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omap_cfg_reg(P19_1710_MMC_CMDDIR);
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omap_cfg_reg(P20_1710_MMC_DATDIR0);
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}
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if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
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omap_cfg_reg(MMC_DAT1);
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/* NOTE: DAT2 can be on W10 (here) or M15 */
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if (!mmc_controller->slots[0].nomux)
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omap_cfg_reg(MMC_DAT2);
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omap_cfg_reg(MMC_DAT3);
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}
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}
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/* Block 2 is on newer chips, and has many pinout options */
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if (cpu_is_omap16xx() && controller_nr == 1) {
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if (!mmc_controller->slots[1].nomux) {
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omap_cfg_reg(Y8_1610_MMC2_CMD);
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omap_cfg_reg(Y10_1610_MMC2_CLK);
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omap_cfg_reg(R18_1610_MMC2_CLKIN);
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omap_cfg_reg(W8_1610_MMC2_DAT0);
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if (mmc_controller->slots[1].wires == 4) {
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omap_cfg_reg(V8_1610_MMC2_DAT1);
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omap_cfg_reg(W15_1610_MMC2_DAT2);
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omap_cfg_reg(R10_1610_MMC2_DAT3);
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}
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/* These are needed for the level shifter */
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omap_cfg_reg(V9_1610_MMC2_CMDDIR);
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omap_cfg_reg(V5_1610_MMC2_DATDIR0);
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omap_cfg_reg(W19_1610_MMC2_DATDIR1);
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}
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/* Feedback clock must be set on OMAP-1710 MMC2 */
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if (cpu_is_omap1710())
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omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
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MOD_CONF_CTRL_1);
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}
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}
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#define OMAP_MMC_NR_RES 4
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/*
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* Register MMC devices.
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*/
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static int __init omap_mmc_add(const char *name, int id, unsigned long base,
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unsigned long size, unsigned int irq,
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unsigned rx_req, unsigned tx_req,
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struct omap_mmc_platform_data *data)
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{
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struct platform_device *pdev;
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struct resource res[OMAP_MMC_NR_RES];
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int ret;
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pdev = platform_device_alloc(name, id);
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if (!pdev)
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return -ENOMEM;
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memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
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res[0].start = base;
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res[0].end = base + size - 1;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = res[1].end = irq;
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res[1].flags = IORESOURCE_IRQ;
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res[2].start = rx_req;
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res[2].name = "rx";
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res[2].flags = IORESOURCE_DMA;
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res[3].start = tx_req;
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res[3].name = "tx";
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res[3].flags = IORESOURCE_DMA;
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if (cpu_is_omap7xx())
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data->slots[0].features = MMC_OMAP7XX;
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if (cpu_is_omap15xx())
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data->slots[0].features = MMC_OMAP15XX;
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if (cpu_is_omap16xx())
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data->slots[0].features = MMC_OMAP16XX;
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ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
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if (ret == 0)
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ret = platform_device_add_data(pdev, data, sizeof(*data));
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if (ret)
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goto fail;
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ret = platform_device_add(pdev);
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if (ret)
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goto fail;
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/* return device handle to board setup code */
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data->dev = &pdev->dev;
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return 0;
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fail:
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platform_device_put(pdev);
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return ret;
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}
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void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers)
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{
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int i;
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for (i = 0; i < nr_controllers; i++) {
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unsigned long base, size;
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unsigned rx_req, tx_req;
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unsigned int irq = 0;
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if (!mmc_data[i])
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continue;
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omap1_mmc_mux(mmc_data[i], i);
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switch (i) {
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case 0:
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base = OMAP1_MMC1_BASE;
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irq = INT_MMC;
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rx_req = 22;
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tx_req = 21;
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break;
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case 1:
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if (!cpu_is_omap16xx())
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return;
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base = OMAP1_MMC2_BASE;
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irq = INT_1610_MMC2;
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rx_req = 55;
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tx_req = 54;
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break;
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default:
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continue;
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}
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size = OMAP1_MMC_SIZE;
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omap_mmc_add("mmci-omap", i, base, size, irq,
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rx_req, tx_req, mmc_data[i]);
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}
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}
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#endif
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/*-------------------------------------------------------------------------*/
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/* OMAP7xx SPI support */
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#if IS_ENABLED(CONFIG_SPI_OMAP_100K)
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struct platform_device omap_spi1 = {
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.name = "omap1_spi100k",
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.id = 1,
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};
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struct platform_device omap_spi2 = {
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.name = "omap1_spi100k",
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.id = 2,
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};
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static void omap_init_spi100k(void)
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{
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if (!cpu_is_omap7xx())
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return;
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omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
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if (omap_spi1.dev.platform_data)
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platform_device_register(&omap_spi1);
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omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
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if (omap_spi2.dev.platform_data)
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platform_device_register(&omap_spi2);
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}
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#else
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static inline void omap_init_spi100k(void)
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{
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}
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#endif
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/*-------------------------------------------------------------------------*/
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static inline void omap_init_sti(void) {}
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/* Numbering for the SPI-capable controllers when used for SPI:
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* spi = 1
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* uwire = 2
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* mmc1..2 = 3..4
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* mcbsp1..3 = 5..7
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*/
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#if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
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#define OMAP_UWIRE_BASE 0xfffb3000
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static struct resource uwire_resources[] = {
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{
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.start = OMAP_UWIRE_BASE,
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.end = OMAP_UWIRE_BASE + 0x20,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap_uwire_device = {
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.name = "omap_uwire",
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.id = -1,
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.num_resources = ARRAY_SIZE(uwire_resources),
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.resource = uwire_resources,
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};
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static void omap_init_uwire(void)
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{
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/* FIXME define and use a boot tag; not all boards will be hooking
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* up devices to the microwire controller, and multi-board configs
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* mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
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*/
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/* board-specific code must configure chipselects (only a few
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* are normally used) and SCLK/SDI/SDO (each has two choices).
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*/
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(void) platform_device_register(&omap_uwire_device);
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}
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#else
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static inline void omap_init_uwire(void) {}
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#endif
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#define OMAP1_RNG_BASE 0xfffe5000
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static struct resource omap1_rng_resources[] = {
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{
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.start = OMAP1_RNG_BASE,
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.end = OMAP1_RNG_BASE + 0x4f,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap1_rng_device = {
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.name = "omap_rng",
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.id = -1,
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.num_resources = ARRAY_SIZE(omap1_rng_resources),
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.resource = omap1_rng_resources,
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};
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static void omap1_init_rng(void)
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{
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if (!cpu_is_omap16xx())
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return;
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(void) platform_device_register(&omap1_rng_device);
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}
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/*-------------------------------------------------------------------------*/
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/*
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* This gets called after board-specific INIT_MACHINE, and initializes most
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* on-chip peripherals accessible on this board (except for few like USB):
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*
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* (a) Does any "standard config" pin muxing needed. Board-specific
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* code will have muxed GPIO pins and done "nonstandard" setup;
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* that code could live in the boot loader.
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* (b) Populating board-specific platform_data with the data drivers
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* rely on to handle wiring variations.
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* (c) Creating platform devices as meaningful on this board and
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* with this kernel configuration.
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*
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* Claiming GPIOs, and setting their direction and initial values, is the
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* responsibility of the device drivers. So is responding to probe().
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*
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* Board-specific knowledge like creating devices or pin setup is to be
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* kept out of drivers as much as possible. In particular, pin setup
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* may be handled by the boot loader, and drivers should expect it will
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* normally have been done by the time they're probed.
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*/
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static int __init omap1_init_devices(void)
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{
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if (!cpu_class_is_omap1())
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return -ENODEV;
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omap_sram_init();
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omap1_clk_late_init();
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/* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
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omap_init_mbox();
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omap_init_rtc();
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omap_init_spi100k();
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omap_init_sti();
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omap_init_uwire();
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omap1_init_rng();
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return 0;
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}
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arch_initcall(omap1_init_devices);
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#if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
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static struct resource wdt_resources[] = {
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{
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.start = 0xfffeb000,
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.end = 0xfffeb07F,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap_wdt_device = {
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.name = "omap_wdt",
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.id = -1,
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.num_resources = ARRAY_SIZE(wdt_resources),
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.resource = wdt_resources,
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};
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static int __init omap_init_wdt(void)
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{
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struct omap_wd_timer_platform_data pdata;
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int ret;
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if (!cpu_is_omap16xx())
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return -ENODEV;
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pdata.read_reset_sources = omap1_get_reset_sources;
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ret = platform_device_register(&omap_wdt_device);
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if (!ret) {
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ret = platform_device_add_data(&omap_wdt_device, &pdata,
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sizeof(pdata));
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if (ret)
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platform_device_del(&omap_wdt_device);
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}
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return ret;
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}
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subsys_initcall(omap_init_wdt);
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#endif
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