forked from Minki/linux
d2199b3487
This is preparation to move imx_soc_device_init to drivers/soc/imx/ There is no reason to must put dt devices under /sys/devices/soc0, they could also be under /sys/devices/platform, so we could pass NULL as parent when calling of_platform_default_populate. Following soc-imx8.c soc-imx-scu.c using device_initcall, need to change return type to int type for imx_soc_device_init. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
83 lines
1.9 KiB
C
83 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
|
|
/*
|
|
* Copyright 2013 Freescale Semiconductor, Inc.
|
|
*/
|
|
|
|
#include <linux/irqchip.h>
|
|
#include <linux/of_platform.h>
|
|
#include <linux/mfd/syscon.h>
|
|
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
|
|
#include <linux/regmap.h>
|
|
#include <asm/mach/arch.h>
|
|
#include <asm/mach/map.h>
|
|
|
|
#include "common.h"
|
|
#include "cpuidle.h"
|
|
#include "hardware.h"
|
|
|
|
static void __init imx6sl_fec_init(void)
|
|
{
|
|
struct regmap *gpr;
|
|
|
|
/* set FEC clock from internal PLL clock source */
|
|
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
|
|
if (!IS_ERR(gpr)) {
|
|
regmap_update_bits(gpr, IOMUXC_GPR1,
|
|
IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
|
|
regmap_update_bits(gpr, IOMUXC_GPR1,
|
|
IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
|
|
} else {
|
|
pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
|
|
}
|
|
}
|
|
|
|
static void __init imx6sl_init_late(void)
|
|
{
|
|
/* imx6sl reuses imx6q cpufreq driver */
|
|
if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
|
|
platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
|
|
|
|
if (IS_ENABLED(CONFIG_SOC_IMX6SL) && cpu_is_imx6sl())
|
|
imx6sl_cpuidle_init();
|
|
else if (IS_ENABLED(CONFIG_SOC_IMX6SLL))
|
|
imx6sx_cpuidle_init();
|
|
}
|
|
|
|
static void __init imx6sl_init_machine(void)
|
|
{
|
|
of_platform_default_populate(NULL, NULL, NULL);
|
|
|
|
if (cpu_is_imx6sl())
|
|
imx6sl_fec_init();
|
|
imx_anatop_init();
|
|
imx6sl_pm_init();
|
|
}
|
|
|
|
static void __init imx6sl_init_irq(void)
|
|
{
|
|
imx_gpc_check_dt();
|
|
imx_init_revision_from_anatop();
|
|
imx_init_l2cache();
|
|
imx_src_init();
|
|
irqchip_init();
|
|
if (cpu_is_imx6sl())
|
|
imx6_pm_ccm_init("fsl,imx6sl-ccm");
|
|
else
|
|
imx6_pm_ccm_init("fsl,imx6sll-ccm");
|
|
}
|
|
|
|
static const char * const imx6sl_dt_compat[] __initconst = {
|
|
"fsl,imx6sl",
|
|
"fsl,imx6sll",
|
|
NULL,
|
|
};
|
|
|
|
DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
|
|
.l2c_aux_val = 0,
|
|
.l2c_aux_mask = ~0,
|
|
.init_irq = imx6sl_init_irq,
|
|
.init_machine = imx6sl_init_machine,
|
|
.init_late = imx6sl_init_late,
|
|
.dt_compat = imx6sl_dt_compat,
|
|
MACHINE_END
|