linux/drivers/gpu/drm/nouveau/nvkm/subdev/pci
Pierre Moreau 5d5b43f59b drm/nouveau/pci: Handle 5-bit and 8-bit tag field
If the hardware supports extended tag field (8-bit ones), then enable it.

This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).

In case extended tag field is not supported, 5-bit tag field is used which
limits the possible number of requests to 32. Apparently bits 7:0 of
0x08841c stores some number of outstanding requests, so cap it to 32 if
extended tag is unsupported.

Fixes: fdo#86537

v2: Restrict changes to chipsets >= 0x84
v3:
  * Add nvkm_pci_mask to pci.h
  * Mask bit 8 before setting it
v4:
  * Rename `add` argument of nvkm_pci_mask to `value`
  * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset
    checks
v5:
  * Rebase code on latest PCI structure
  * Restore PCIe check
  * Fix namings in nvkm_pci_mask
  * Rephrase part of the commit message

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03 15:02:18 +10:00
..
agp.c drm/nouveau/nouveau: Disable AGP for SiS 761 2015-10-12 13:48:29 +10:00
agp.h drm/nouveau/pci: merge agp handling from nouveau drm 2015-08-28 12:40:49 +10:00
base.c drm/nouveau/pci: Handle 5-bit and 8-bit tag field 2015-11-03 15:02:18 +10:00
g84.c drm/nouveau/pci: Handle 5-bit and 8-bit tag field 2015-11-03 15:02:18 +10:00
g94.c drm/nouveau/pci: Handle 5-bit and 8-bit tag field 2015-11-03 15:02:18 +10:00
gf100.c drm/nouveau/pci: Handle 5-bit and 8-bit tag field 2015-11-03 15:02:18 +10:00
Kbuild drm/nouveau/pci/nv46: attempt to fix msi, and re-enable by default 2015-11-03 15:02:18 +10:00
nv4c.c
nv04.c
nv40.c drm/nouveau/pci/g94: split implementation from nv40 2015-11-03 15:02:18 +10:00
nv46.c drm/nouveau/pci/nv46: attempt to fix msi, and re-enable by default 2015-11-03 15:02:18 +10:00
priv.h drm/nouveau/pci: Handle 5-bit and 8-bit tag field 2015-11-03 15:02:18 +10:00