25fdd5933e
SDM845 SoC includes the Mobile Display Sub System (MDSS) which is a
top level wrapper consisting of Display Processing Unit (DPU) and
display peripheral modules such as Display Serial Interface (DSI)
and DisplayPort (DP).
MDSS functions essentially as a back-end composition engine. It blends
video and graphic images stored in the frame buffers and scans out the
composed image to a display sink (over DSI/DP).
The following diagram represents hardware blocks for a simple pipeline
(two planes are present on a given crtc which is connected to a DSI
connector):
MDSS
+---------------------------------+
| +-----------------------------+ |
| | DPU | |
| | +--------+ +--------+ | |
| | | SSPP | | SSPP | | |
| | +----+---+ +----+---+ | |
| | | | | |
| | +----v-----------v---+ | |
| | | Layer Mixer (LM) | | |
| | +--------------------+ | |
| | +--------------------+ | |
| | | PingPong (PP) | | |
| | +--------------------+ | |
| | +--------------------+ | |
| | | INTERFACE (VIDEO) | | |
| | +---+----------------+ | |
| +------|----------------------+ |
| | |
| +------|---------------------+ |
| | | DISPLAY PERIPHERALS | |
| | +---v-+ +-----+ | |
| | | DSI | | DP | | |
| | +-----+ +-----+ | |
| +----------------------------+ |
+---------------------------------+
The number of DPU sub-blocks (i.e. SSPPs, LMs, PP blocks and INTFs)
depends on SoC capabilities.
Overview of DPU sub-blocks:
---------------------------
* Source Surface Processor (SSPP):
Refers to any of hardware pipes like ViG, DMA etc. Only ViG pipes are
capable of performing format conversion, scaling and quality improvement
for source surfaces.
* Layer Mixer (LM):
Blend source surfaces together (in requested zorder)
* PingPong (PP):
This block controls frame done interrupt output, EOL and EOF generation,
overflow/underflow control.
* Display interface (INTF):
Timing generator and interface connecting the display peripherals.
DRM components mapping to DPU architecture:
------------------------------------------
PLANEs maps to SSPPs
CRTC maps to LMs
Encoder maps to PPs, INTFs
Data flow setup:
---------------
MDSS hardware can support various data flows (e.g.):
- Dual pipe: Output from two LMs combined to single display.
- Split display: Output from two LMs connected to two separate
interfaces.
The hardware capabilities determine the number of concurrent data paths
possible. Any control path (i.e. pipeline w/i DPU) can be routed to any
of the hardware data paths. A given control path can be triggered,
flushed and controlled independently.
Changes in v3:
- Move msm_media_info.h from uapi to dpu/ subdir
- Remove preclose callback dpu (it's handled in core)
- Fix kbuild warnings with parent_ops
- Remove unused functions from dpu_core_irq
- Rename mdss_phys to mdss
- Rename mdp_phys address space to mdp
- Drop _phys from vbif and regdma binding names
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[robclark minor rebase]
Signed-off-by: Rob Clark <robdclark@gmail.com>
129 lines
3.6 KiB
C
129 lines
3.6 KiB
C
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DPU_HW_VBIF_H
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#define _DPU_HW_VBIF_H
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#include "dpu_hw_catalog.h"
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_util.h"
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struct dpu_hw_vbif;
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/**
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* struct dpu_hw_vbif_ops : Interface to the VBIF hardware driver functions
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* Assumption is these functions will be called after clocks are enabled
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*/
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struct dpu_hw_vbif_ops {
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/**
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* set_limit_conf - set transaction limit config
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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* @rd: true for read limit; false for write limit
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* @limit: outstanding transaction limit
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*/
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void (*set_limit_conf)(struct dpu_hw_vbif *vbif,
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u32 xin_id, bool rd, u32 limit);
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/**
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* get_limit_conf - get transaction limit config
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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* @rd: true for read limit; false for write limit
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* @return: outstanding transaction limit
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*/
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u32 (*get_limit_conf)(struct dpu_hw_vbif *vbif,
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u32 xin_id, bool rd);
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/**
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* set_halt_ctrl - set halt control
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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* @enable: halt control enable
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*/
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void (*set_halt_ctrl)(struct dpu_hw_vbif *vbif,
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u32 xin_id, bool enable);
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/**
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* get_halt_ctrl - get halt control
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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* @return: halt control enable
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*/
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bool (*get_halt_ctrl)(struct dpu_hw_vbif *vbif,
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u32 xin_id);
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/**
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* set_qos_remap - set QoS priority remap
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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* @level: priority level
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* @remap_level: remapped level
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*/
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void (*set_qos_remap)(struct dpu_hw_vbif *vbif,
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u32 xin_id, u32 level, u32 remap_level);
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/**
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* set_mem_type - set memory type
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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* @value: memory type value
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*/
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void (*set_mem_type)(struct dpu_hw_vbif *vbif,
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u32 xin_id, u32 value);
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/**
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* clear_errors - clear any vbif errors
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* This function clears any detected pending/source errors
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* on the VBIF interface, and optionally returns the detected
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* error mask(s).
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* @vbif: vbif context driver
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* @pnd_errors: pointer to pending error reporting variable
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* @src_errors: pointer to source error reporting variable
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*/
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void (*clear_errors)(struct dpu_hw_vbif *vbif,
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u32 *pnd_errors, u32 *src_errors);
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/**
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* set_write_gather_en - set write_gather enable
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* @vbif: vbif context driver
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* @xin_id: client interface identifier
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*/
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void (*set_write_gather_en)(struct dpu_hw_vbif *vbif, u32 xin_id);
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};
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struct dpu_hw_vbif {
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/* base */
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struct dpu_hw_blk_reg_map hw;
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/* vbif */
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enum dpu_vbif idx;
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const struct dpu_vbif_cfg *cap;
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/* ops */
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struct dpu_hw_vbif_ops ops;
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};
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/**
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* dpu_hw_vbif_init - initializes the vbif driver for the passed interface idx
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* @idx: Interface index for which driver object is required
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* @addr: Mapped register io address of MDSS
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* @m: Pointer to mdss catalog data
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*/
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struct dpu_hw_vbif *dpu_hw_vbif_init(enum dpu_vbif idx,
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void __iomem *addr,
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const struct dpu_mdss_cfg *m);
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void dpu_hw_vbif_destroy(struct dpu_hw_vbif *vbif);
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#endif /*_DPU_HW_VBIF_H */
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