forked from Minki/linux
d70b3ef54c
Pull x86 core updates from Ingo Molnar:
"There were so many changes in the x86/asm, x86/apic and x86/mm topics
in this cycle that the topical separation of -tip broke down somewhat -
so the result is a more traditional architecture pull request,
collected into the 'x86/core' topic.
The topics were still maintained separately as far as possible, so
bisectability and conceptual separation should still be pretty good -
but there were a handful of merge points to avoid excessive
dependencies (and conflicts) that would have been poorly tested in the
end.
The next cycle will hopefully be much more quiet (or at least will
have fewer dependencies).
The main changes in this cycle were:
* x86/apic changes, with related IRQ core changes: (Jiang Liu, Thomas
Gleixner)
- This is the second and most intrusive part of changes to the x86
interrupt handling - full conversion to hierarchical interrupt
domains:
[IOAPIC domain] -----
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[MSI domain] --------[Remapping domain] ----- [ Vector domain ]
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[HPET MSI domain] ----- |
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[DMAR domain] -----------------------------
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[Legacy domain] -----------------------------
This now reflects the actual hardware and allowed us to distangle
the domain specific code from the underlying parent domain, which
can be optional in the case of interrupt remapping. It's a clear
separation of functionality and removes quite some duct tape
constructs which plugged the remap code between ioapic/msi/hpet
and the vector management.
- Intel IOMMU IRQ remapping enhancements, to allow direct interrupt
injection into guests (Feng Wu)
* x86/asm changes:
- Tons of cleanups and small speedups, micro-optimizations. This
is in preparation to move a good chunk of the low level entry
code from assembly to C code (Denys Vlasenko, Andy Lutomirski,
Brian Gerst)
- Moved all system entry related code to a new home under
arch/x86/entry/ (Ingo Molnar)
- Removal of the fragile and ugly CFI dwarf debuginfo annotations.
Conversion to C will reintroduce many of them - but meanwhile
they are only getting in the way, and the upstream kernel does
not rely on them (Ingo Molnar)
- NOP handling refinements. (Borislav Petkov)
* x86/mm changes:
- Big PAT and MTRR rework: making the code more robust and
preparing to phase out exposing direct MTRR interfaces to drivers -
in favor of using PAT driven interfaces (Toshi Kani, Luis R
Rodriguez, Borislav Petkov)
- New ioremap_wt()/set_memory_wt() interfaces to support
Write-Through cached memory mappings. This is especially
important for good performance on NVDIMM hardware (Toshi Kani)
* x86/ras changes:
- Add support for deferred errors on AMD (Aravind Gopalakrishnan)
This is an important RAS feature which adds hardware support for
poisoned data. That means roughly that the hardware marks data
which it has detected as corrupted but wasn't able to correct, as
poisoned data and raises an APIC interrupt to signal that in the
form of a deferred error. It is the OS's responsibility then to
take proper recovery action and thus prolonge system lifetime as
far as possible.
- Add support for Intel "Local MCE"s: upcoming CPUs will support
CPU-local MCE interrupts, as opposed to the traditional system-
wide broadcasted MCE interrupts (Ashok Raj)
- Misc cleanups (Borislav Petkov)
* x86/platform changes:
- Intel Atom SoC updates
... and lots of other cleanups, fixlets and other changes - see the
shortlog and the Git log for details"
* 'x86-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (222 commits)
x86/hpet: Use proper hpet device number for MSI allocation
x86/hpet: Check for irq==0 when allocating hpet MSI interrupts
x86/mm/pat, drivers/infiniband/ipath: Use arch_phys_wc_add() and require PAT disabled
x86/mm/pat, drivers/media/ivtv: Use arch_phys_wc_add() and require PAT disabled
x86/platform/intel/baytrail: Add comments about why we disabled HPET on Baytrail
genirq: Prevent crash in irq_move_irq()
genirq: Enhance irq_data_to_desc() to support hierarchy irqdomain
iommu, x86: Properly handle posted interrupts for IOMMU hotplug
iommu, x86: Provide irq_remapping_cap() interface
iommu, x86: Setup Posted-Interrupts capability for Intel iommu
iommu, x86: Add cap_pi_support() to detect VT-d PI capability
iommu, x86: Avoid migrating VT-d posted interrupts
iommu, x86: Save the mode (posted or remapped) of an IRTE
iommu, x86: Implement irq_set_vcpu_affinity for intel_ir_chip
iommu: dmar: Provide helper to copy shared irte fields
iommu: dmar: Extend struct irte for VT-d Posted-Interrupts
iommu: Add new member capability to struct irq_remap_ops
x86/asm/entry/64: Disentangle error_entry/exit gsbase/ebx/usermode code
x86/asm/entry/32: Shorten __audit_syscall_entry() args preparation
x86/asm/entry/32: Explain reloading of registers after __audit_syscall_entry()
...
139 lines
3.4 KiB
C
139 lines
3.4 KiB
C
/*
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* Written by: Matthew Dobson, IBM Corporation
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*
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* Copyright (C) 2002, IBM Corp.
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <colpatch@us.ibm.com>
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*/
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#ifndef _ASM_X86_TOPOLOGY_H
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#define _ASM_X86_TOPOLOGY_H
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#ifdef CONFIG_X86_32
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# ifdef CONFIG_SMP
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# define ENABLE_TOPO_DEFINES
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# endif
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#else
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# ifdef CONFIG_SMP
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# define ENABLE_TOPO_DEFINES
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# endif
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#endif
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/*
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* to preserve the visibility of NUMA_NO_NODE definition,
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* moved to there from here. May be used independent of
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* CONFIG_NUMA.
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*/
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#include <linux/numa.h>
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#ifdef CONFIG_NUMA
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#include <linux/cpumask.h>
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#include <asm/mpspec.h>
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/* Mappings between logical cpu number and node number */
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DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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/*
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* override generic percpu implementation of cpu_to_node
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*/
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extern int __cpu_to_node(int cpu);
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#define cpu_to_node __cpu_to_node
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extern int early_cpu_to_node(int cpu);
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#else /* !CONFIG_DEBUG_PER_CPU_MAPS */
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/* Same function but used if called before per_cpu areas are setup */
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static inline int early_cpu_to_node(int cpu)
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{
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return early_per_cpu(x86_cpu_to_node_map, cpu);
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}
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#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
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/* Mappings between node number and cpus on that node. */
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extern cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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extern const struct cpumask *cpumask_of_node(int node);
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#else
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/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
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static inline const struct cpumask *cpumask_of_node(int node)
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{
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return node_to_cpumask_map[node];
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}
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#endif
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extern void setup_node_to_cpumask_map(void);
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/*
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* Returns the number of the node containing Node 'node'. This
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* architecture is flat, so it is a pretty simple function!
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*/
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#define parent_node(node) (node)
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#define pcibus_to_node(bus) __pcibus_to_node(bus)
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extern int __node_distance(int, int);
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#define node_distance(a, b) __node_distance(a, b)
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#else /* !CONFIG_NUMA */
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static inline int numa_node_id(void)
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{
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return 0;
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}
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/*
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* indicate override:
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*/
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#define numa_node_id numa_node_id
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static inline int early_cpu_to_node(int cpu)
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{
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return 0;
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}
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static inline void setup_node_to_cpumask_map(void) { }
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#endif
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#include <asm-generic/topology.h>
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extern const struct cpumask *cpu_coregroup_mask(int cpu);
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#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
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#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
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#ifdef ENABLE_TOPO_DEFINES
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#define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu))
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#define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu))
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#endif
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static inline void arch_fix_phys_package_id(int num, u32 slot)
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{
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}
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struct pci_bus;
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int x86_pci_root_bus_node(int bus);
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void x86_pci_root_bus_resources(int bus, struct list_head *resources);
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#endif /* _ASM_X86_TOPOLOGY_H */
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