forked from Minki/linux
b8c5c990a0
The DT bindings example for the Tegra XUSB controller omits the 'lanes' subnode in the XUSB pad controller which is required according to the DT bindings documentation for the Tegra XUSB pad controller[0]. In addition to this the phy-names with the suffix 'utmi' are also not valid and should have the suffix 'usb2'. Correct both the XUSB pad controller pad path and phy-names for the XUSB example. [0]: Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
121 lines
4.6 KiB
Plaintext
121 lines
4.6 KiB
Plaintext
NVIDIA Tegra xHCI controller
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============================
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The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
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the Tegra XUSB pad controller.
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Required properties:
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--------------------
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- compatible: Must be:
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- Tegra124: "nvidia,tegra124-xusb"
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- Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
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- Tegra210: "nvidia,tegra210-xusb"
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- reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
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registers and XUSB IPFS registers.
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- reg-names: Must contain the following entries:
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- "hcd"
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- "fpci"
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- "ipfs"
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- interrupts: Must contain the xHCI host interrupt and the mailbox interrupt.
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clock/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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- xusb_host
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- xusb_host_src
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- xusb_falcon_src
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- xusb_ss
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- xusb_ss_src
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- xusb_ss_div2
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- xusb_hs_src
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- xusb_fs_src
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- pll_u_480m
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- clk_m
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- pll_e
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- xusb_host
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- xusb_ss
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- xusb_src
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Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src.
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- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
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configure the USB pads used by the XHCI controller
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For Tegra124 and Tegra132:
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- avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
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- dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
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- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
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- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
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- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
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- avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
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- hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
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- hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
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For Tegra210:
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- dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
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- hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
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- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
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- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
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- avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
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- dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
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- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.
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Optional properties:
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--------------------
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- phys: Must contain an entry for each entry in phy-names.
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See ../phy/phy-bindings.txt for details.
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- phy-names: Should include an entry for each PHY used by the controller. The
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following PHYs are available:
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- Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
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- Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
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- Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2,
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usb3-3
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Example:
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--------
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usb@0,70090000 {
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compatible = "nvidia,tegra124-xusb";
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reg = <0x0 0x70090000 0x0 0x8000>,
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<0x0 0x70098000 0x0 0x1000>,
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<0x0 0x70099000 0x0 0x1000>;
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reg-names = "hcd", "fpci", "ipfs";
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
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<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
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<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
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<&tegra_car TEGRA124_CLK_XUSB_SS>,
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<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
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<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
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<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
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<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
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<&tegra_car TEGRA124_CLK_PLL_U_480M>,
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<&tegra_car TEGRA124_CLK_CLK_M>,
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<&tegra_car TEGRA124_CLK_PLL_E>;
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clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",
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"xusb_ss", "xusb_ss_div2", "xusb_ss_src",
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"xusb_hs_src", "xusb_fs_src", "pll_u_480m",
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"clk_m", "pll_e";
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resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>;
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reset-names = "xusb_host", "xusb_ss", "xusb_src";
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nvidia,xusb-padctl = <&padctl>;
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phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
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<&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
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<&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
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phy-names = "usb2-1", "usb2-2", "usb3-0";
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avddio-pex-supply = <&vdd_1v05_run>;
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dvddio-pex-supply = <&vdd_1v05_run>;
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avdd-usb-supply = <&vdd_3v3_lp0>;
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avdd-pll-utmip-supply = <&vddio_1v8>;
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avdd-pll-erefe-supply = <&avdd_1v05_run>;
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avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
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hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
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hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
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};
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