a999933db9
mips_swiotlb_ops differs from the generic swiotlb_dma_ops only in that
it contains a mb() barrier after each operations that maps or syncs
dma memory to the device.
The dma operations are defined to not be memory barriers, but instead
the write* operations to kick the DMA off are supposed to contain them.
For mips this handled by war_io_reorder_wmb(), which evaluates to the
stronger wmb() instead of the pure compiler barrier barrier() for
just those platforms that use swiotlb, so I think we are covered
properly.
[paul.burton@mips.com:
- Include linux/swiotlb.h to fix build failures for configs with
CONFIG_SWIOTLB=y.]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20038/
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
33 lines
784 B
C
33 lines
784 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#include <linux/swiotlb.h>
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extern const struct dma_map_ops jazz_dma_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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#if defined(CONFIG_MACH_JAZZ)
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return &jazz_dma_ops;
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#elif defined(CONFIG_SWIOTLB)
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return &swiotlb_dma_ops;
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#elif defined(CONFIG_DMA_NONCOHERENT_OPS)
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return &dma_noncoherent_ops;
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#else
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return &dma_direct_ops;
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#endif
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}
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#define arch_setup_dma_ops arch_setup_dma_ops
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static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
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u64 size, const struct iommu_ops *iommu,
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bool coherent)
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{
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#ifdef CONFIG_DMA_PERDEV_COHERENT
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dev->archdata.dma_coherent = coherent;
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#endif
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}
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#endif /* _ASM_DMA_MAPPING_H */
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