linux/arch/x86/events
Kim Phillips 8b0bed7d41 perf/x86/amd/ibs: Support 27-bit extended Op/cycle counter
IBS hardware with the OpCntExt feature gets a 7-bit wider internal
counter.  Both the maximum and current count bitfields in the
IBS_OP_CTL register are extended to support reading and writing it.

No changes are necessary to the driver for handling the extra
contiguous current count bits (IbsOpCurCnt), as the driver already
passes through 32 bits of that field.  However, the driver has to do
some extra bit manipulation when converting from a period to the
non-contiguous (although conveniently aligned) extra bits in the
IbsOpMaxCnt bitfield.

This decreases IBS Op interrupt overhead when the period is over
1,048,560 (0xffff0), which would previously activate the driver's
software counter.  That threshold is now 134,217,712 (0x7fffff0).

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200908214740.18097-7-kim.phillips@amd.com
2020-09-10 11:19:36 +02:00
..
amd perf/x86/amd/ibs: Support 27-bit extended Op/cycle counter 2020-09-10 11:19:36 +02:00
intel perf/x86/intel/ds: Fix x86_pmu_stop warning for large PEBS 2020-09-10 11:19:33 +02:00
zhaoxin x86/perf: Fix a typo 2020-07-22 10:22:08 +02:00
core.c perf/x86/amd: Fix sampling Large Increment per Cycle events 2020-09-10 11:19:35 +02:00
Kconfig treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile perf/x86/rapl: Fix RAPL config variable bug 2020-06-02 11:52:56 +02:00
msr.c perf/x86/msr: Add Tremont support 2020-02-11 13:17:50 +01:00
perf_event.h perf/x86/intel: Support TopDown metrics on Ice Lake 2020-08-18 16:34:37 +02:00
probe.c perf/x86/rapl: Make perf_probe_msr() more robust and flexible 2020-05-28 07:58:55 +02:00
probe.h perf/x86: Add MSR probe interface 2019-06-24 19:28:31 +02:00
rapl.c perf/x86/rapl: Add support for Intel SPR platform 2020-08-14 12:35:12 +02:00