forked from Minki/linux
b43a7ffbf3
policy->cpus contains all online cpus that have single shared clock line. And their frequencies are always updated together. Many SMP system's cpufreq drivers take care of this in individual drivers but the best place for this code is in cpufreq core. This patch modifies cpufreq_notify_transition() to notify frequency change for all cpus in policy->cpus and hence updates all users of this API. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
1038 lines
25 KiB
C
1038 lines
25 KiB
C
/*
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* acpi-cpufreq.c - ACPI Processor P-States Driver
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*
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* Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
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* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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* Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
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* Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <linux/cpufreq.h>
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#include <linux/compiler.h>
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#include <linux/dmi.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/uaccess.h>
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#include <acpi/processor.h>
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#include <asm/msr.h>
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#include <asm/processor.h>
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#include <asm/cpufeature.h>
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#include "mperf.h"
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MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
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MODULE_DESCRIPTION("ACPI Processor P-States Driver");
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MODULE_LICENSE("GPL");
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#define PFX "acpi-cpufreq: "
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enum {
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UNDEFINED_CAPABLE = 0,
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SYSTEM_INTEL_MSR_CAPABLE,
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SYSTEM_AMD_MSR_CAPABLE,
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SYSTEM_IO_CAPABLE,
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};
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#define INTEL_MSR_RANGE (0xffff)
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#define AMD_MSR_RANGE (0x7)
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#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
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struct acpi_cpufreq_data {
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struct acpi_processor_performance *acpi_data;
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struct cpufreq_frequency_table *freq_table;
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unsigned int resume;
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unsigned int cpu_feature;
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};
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static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
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/* acpi_perf_data is a pointer to percpu data. */
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static struct acpi_processor_performance __percpu *acpi_perf_data;
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static struct cpufreq_driver acpi_cpufreq_driver;
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static unsigned int acpi_pstate_strict;
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static bool boost_enabled, boost_supported;
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static struct msr __percpu *msrs;
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static bool boost_state(unsigned int cpu)
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{
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u32 lo, hi;
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u64 msr;
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_INTEL:
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rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
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msr = lo | ((u64)hi << 32);
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return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
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case X86_VENDOR_AMD:
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rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
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msr = lo | ((u64)hi << 32);
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return !(msr & MSR_K7_HWCR_CPB_DIS);
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}
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return false;
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}
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static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
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{
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u32 cpu;
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u32 msr_addr;
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u64 msr_mask;
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_INTEL:
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msr_addr = MSR_IA32_MISC_ENABLE;
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msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
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break;
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case X86_VENDOR_AMD:
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msr_addr = MSR_K7_HWCR;
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msr_mask = MSR_K7_HWCR_CPB_DIS;
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break;
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default:
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return;
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}
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rdmsr_on_cpus(cpumask, msr_addr, msrs);
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for_each_cpu(cpu, cpumask) {
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struct msr *reg = per_cpu_ptr(msrs, cpu);
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if (enable)
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reg->q &= ~msr_mask;
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else
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reg->q |= msr_mask;
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}
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wrmsr_on_cpus(cpumask, msr_addr, msrs);
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}
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static ssize_t _store_boost(const char *buf, size_t count)
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{
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int ret;
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unsigned long val = 0;
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if (!boost_supported)
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return -EINVAL;
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ret = kstrtoul(buf, 10, &val);
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if (ret || (val > 1))
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return -EINVAL;
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if ((val && boost_enabled) || (!val && !boost_enabled))
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return count;
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get_online_cpus();
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boost_set_msrs(val, cpu_online_mask);
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put_online_cpus();
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boost_enabled = val;
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pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
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return count;
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}
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static ssize_t store_global_boost(struct kobject *kobj, struct attribute *attr,
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const char *buf, size_t count)
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{
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return _store_boost(buf, count);
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}
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static ssize_t show_global_boost(struct kobject *kobj,
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struct attribute *attr, char *buf)
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{
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return sprintf(buf, "%u\n", boost_enabled);
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}
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static struct global_attr global_boost = __ATTR(boost, 0644,
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show_global_boost,
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store_global_boost);
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#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
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static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
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size_t count)
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{
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return _store_boost(buf, count);
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}
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static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
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{
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return sprintf(buf, "%u\n", boost_enabled);
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}
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static struct freq_attr cpb = __ATTR(cpb, 0644, show_cpb, store_cpb);
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#endif
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static int check_est_cpu(unsigned int cpuid)
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{
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struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
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return cpu_has(cpu, X86_FEATURE_EST);
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}
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static int check_amd_hwpstate_cpu(unsigned int cpuid)
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{
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struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
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return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
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}
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static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
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{
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struct acpi_processor_performance *perf;
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int i;
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perf = data->acpi_data;
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for (i = 0; i < perf->state_count; i++) {
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if (value == perf->states[i].status)
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return data->freq_table[i].frequency;
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}
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return 0;
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}
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static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
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{
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int i;
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struct acpi_processor_performance *perf;
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
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msr &= AMD_MSR_RANGE;
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else
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msr &= INTEL_MSR_RANGE;
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perf = data->acpi_data;
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for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
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if (msr == perf->states[data->freq_table[i].index].status)
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return data->freq_table[i].frequency;
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}
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return data->freq_table[0].frequency;
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}
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static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
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{
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switch (data->cpu_feature) {
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case SYSTEM_INTEL_MSR_CAPABLE:
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case SYSTEM_AMD_MSR_CAPABLE:
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return extract_msr(val, data);
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case SYSTEM_IO_CAPABLE:
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return extract_io(val, data);
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default:
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return 0;
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}
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}
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struct msr_addr {
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u32 reg;
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};
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struct io_addr {
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u16 port;
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u8 bit_width;
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};
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struct drv_cmd {
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unsigned int type;
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const struct cpumask *mask;
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union {
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struct msr_addr msr;
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struct io_addr io;
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} addr;
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u32 val;
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};
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/* Called via smp_call_function_single(), on the target CPU */
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static void do_drv_read(void *_cmd)
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{
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struct drv_cmd *cmd = _cmd;
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u32 h;
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switch (cmd->type) {
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case SYSTEM_INTEL_MSR_CAPABLE:
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case SYSTEM_AMD_MSR_CAPABLE:
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rdmsr(cmd->addr.msr.reg, cmd->val, h);
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break;
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case SYSTEM_IO_CAPABLE:
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acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
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&cmd->val,
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(u32)cmd->addr.io.bit_width);
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break;
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default:
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break;
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}
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}
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/* Called via smp_call_function_many(), on the target CPUs */
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static void do_drv_write(void *_cmd)
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{
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struct drv_cmd *cmd = _cmd;
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u32 lo, hi;
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switch (cmd->type) {
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case SYSTEM_INTEL_MSR_CAPABLE:
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rdmsr(cmd->addr.msr.reg, lo, hi);
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lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
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wrmsr(cmd->addr.msr.reg, lo, hi);
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break;
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case SYSTEM_AMD_MSR_CAPABLE:
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wrmsr(cmd->addr.msr.reg, cmd->val, 0);
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break;
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case SYSTEM_IO_CAPABLE:
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acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
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cmd->val,
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(u32)cmd->addr.io.bit_width);
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break;
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default:
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break;
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}
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}
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static void drv_read(struct drv_cmd *cmd)
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{
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int err;
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cmd->val = 0;
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err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
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WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
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}
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static void drv_write(struct drv_cmd *cmd)
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{
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int this_cpu;
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this_cpu = get_cpu();
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if (cpumask_test_cpu(this_cpu, cmd->mask))
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do_drv_write(cmd);
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smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
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put_cpu();
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}
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static u32 get_cur_val(const struct cpumask *mask)
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{
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struct acpi_processor_performance *perf;
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struct drv_cmd cmd;
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if (unlikely(cpumask_empty(mask)))
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return 0;
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switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
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case SYSTEM_INTEL_MSR_CAPABLE:
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cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
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cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
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break;
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case SYSTEM_AMD_MSR_CAPABLE:
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cmd.type = SYSTEM_AMD_MSR_CAPABLE;
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cmd.addr.msr.reg = MSR_AMD_PERF_STATUS;
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break;
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case SYSTEM_IO_CAPABLE:
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cmd.type = SYSTEM_IO_CAPABLE;
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perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
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cmd.addr.io.port = perf->control_register.address;
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cmd.addr.io.bit_width = perf->control_register.bit_width;
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break;
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default:
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return 0;
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}
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cmd.mask = mask;
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drv_read(&cmd);
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pr_debug("get_cur_val = %u\n", cmd.val);
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return cmd.val;
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}
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static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
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{
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struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
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unsigned int freq;
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unsigned int cached_freq;
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pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
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if (unlikely(data == NULL ||
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data->acpi_data == NULL || data->freq_table == NULL)) {
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return 0;
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}
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cached_freq = data->freq_table[data->acpi_data->state].frequency;
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freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
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if (freq != cached_freq) {
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/*
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* The dreaded BIOS frequency change behind our back.
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* Force set the frequency on next target call.
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*/
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data->resume = 1;
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}
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pr_debug("cur freq = %u\n", freq);
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return freq;
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}
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static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
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struct acpi_cpufreq_data *data)
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{
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unsigned int cur_freq;
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unsigned int i;
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for (i = 0; i < 100; i++) {
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cur_freq = extract_freq(get_cur_val(mask), data);
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if (cur_freq == freq)
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return 1;
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udelay(10);
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}
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return 0;
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}
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static int acpi_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq, unsigned int relation)
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{
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struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
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struct acpi_processor_performance *perf;
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struct cpufreq_freqs freqs;
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struct drv_cmd cmd;
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unsigned int next_state = 0; /* Index into freq_table */
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unsigned int next_perf_state = 0; /* Index into perf table */
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int result = 0;
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pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
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if (unlikely(data == NULL ||
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data->acpi_data == NULL || data->freq_table == NULL)) {
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return -ENODEV;
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}
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perf = data->acpi_data;
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result = cpufreq_frequency_table_target(policy,
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data->freq_table,
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target_freq,
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relation, &next_state);
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if (unlikely(result)) {
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result = -ENODEV;
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goto out;
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}
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next_perf_state = data->freq_table[next_state].index;
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if (perf->state == next_perf_state) {
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if (unlikely(data->resume)) {
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pr_debug("Called after resume, resetting to P%d\n",
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next_perf_state);
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data->resume = 0;
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} else {
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pr_debug("Already at target state (P%d)\n",
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next_perf_state);
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goto out;
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}
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}
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switch (data->cpu_feature) {
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case SYSTEM_INTEL_MSR_CAPABLE:
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cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
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cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
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cmd.val = (u32) perf->states[next_perf_state].control;
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break;
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case SYSTEM_AMD_MSR_CAPABLE:
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cmd.type = SYSTEM_AMD_MSR_CAPABLE;
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cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
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cmd.val = (u32) perf->states[next_perf_state].control;
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break;
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case SYSTEM_IO_CAPABLE:
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cmd.type = SYSTEM_IO_CAPABLE;
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cmd.addr.io.port = perf->control_register.address;
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cmd.addr.io.bit_width = perf->control_register.bit_width;
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cmd.val = (u32) perf->states[next_perf_state].control;
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break;
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default:
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result = -ENODEV;
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goto out;
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}
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/* cpufreq holds the hotplug lock, so we are safe from here on */
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if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
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cmd.mask = policy->cpus;
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else
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cmd.mask = cpumask_of(policy->cpu);
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freqs.old = perf->states[perf->state].core_frequency * 1000;
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freqs.new = data->freq_table[next_state].frequency;
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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drv_write(&cmd);
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if (acpi_pstate_strict) {
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if (!check_freqs(cmd.mask, freqs.new, data)) {
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pr_debug("acpi_cpufreq_target failed (%d)\n",
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policy->cpu);
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result = -EAGAIN;
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goto out;
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}
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}
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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perf->state = next_perf_state;
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out:
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return result;
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}
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static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
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{
|
|
struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
|
|
|
|
pr_debug("acpi_cpufreq_verify\n");
|
|
|
|
return cpufreq_frequency_table_verify(policy, data->freq_table);
|
|
}
|
|
|
|
static unsigned long
|
|
acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
|
|
{
|
|
struct acpi_processor_performance *perf = data->acpi_data;
|
|
|
|
if (cpu_khz) {
|
|
/* search the closest match to cpu_khz */
|
|
unsigned int i;
|
|
unsigned long freq;
|
|
unsigned long freqn = perf->states[0].core_frequency * 1000;
|
|
|
|
for (i = 0; i < (perf->state_count-1); i++) {
|
|
freq = freqn;
|
|
freqn = perf->states[i+1].core_frequency * 1000;
|
|
if ((2 * cpu_khz) > (freqn + freq)) {
|
|
perf->state = i;
|
|
return freq;
|
|
}
|
|
}
|
|
perf->state = perf->state_count-1;
|
|
return freqn;
|
|
} else {
|
|
/* assume CPU is at P0... */
|
|
perf->state = 0;
|
|
return perf->states[0].core_frequency * 1000;
|
|
}
|
|
}
|
|
|
|
static void free_acpi_perf_data(void)
|
|
{
|
|
unsigned int i;
|
|
|
|
/* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
|
|
for_each_possible_cpu(i)
|
|
free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
|
|
->shared_cpu_map);
|
|
free_percpu(acpi_perf_data);
|
|
}
|
|
|
|
static int boost_notify(struct notifier_block *nb, unsigned long action,
|
|
void *hcpu)
|
|
{
|
|
unsigned cpu = (long)hcpu;
|
|
const struct cpumask *cpumask;
|
|
|
|
cpumask = get_cpu_mask(cpu);
|
|
|
|
/*
|
|
* Clear the boost-disable bit on the CPU_DOWN path so that
|
|
* this cpu cannot block the remaining ones from boosting. On
|
|
* the CPU_UP path we simply keep the boost-disable flag in
|
|
* sync with the current global state.
|
|
*/
|
|
|
|
switch (action) {
|
|
case CPU_UP_PREPARE:
|
|
case CPU_UP_PREPARE_FROZEN:
|
|
boost_set_msrs(boost_enabled, cpumask);
|
|
break;
|
|
|
|
case CPU_DOWN_PREPARE:
|
|
case CPU_DOWN_PREPARE_FROZEN:
|
|
boost_set_msrs(1, cpumask);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
|
|
static struct notifier_block boost_nb = {
|
|
.notifier_call = boost_notify,
|
|
};
|
|
|
|
/*
|
|
* acpi_cpufreq_early_init - initialize ACPI P-States library
|
|
*
|
|
* Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
|
|
* in order to determine correct frequency and voltage pairings. We can
|
|
* do _PDC and _PSD and find out the processor dependency for the
|
|
* actual init that will happen later...
|
|
*/
|
|
static int __init acpi_cpufreq_early_init(void)
|
|
{
|
|
unsigned int i;
|
|
pr_debug("acpi_cpufreq_early_init\n");
|
|
|
|
acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
|
|
if (!acpi_perf_data) {
|
|
pr_debug("Memory allocation error for acpi_perf_data.\n");
|
|
return -ENOMEM;
|
|
}
|
|
for_each_possible_cpu(i) {
|
|
if (!zalloc_cpumask_var_node(
|
|
&per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
|
|
GFP_KERNEL, cpu_to_node(i))) {
|
|
|
|
/* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
|
|
free_acpi_perf_data();
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
|
|
/* Do initialization in ACPI core */
|
|
acpi_processor_preregister_performance(acpi_perf_data);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_SMP
|
|
/*
|
|
* Some BIOSes do SW_ANY coordination internally, either set it up in hw
|
|
* or do it in BIOS firmware and won't inform about it to OS. If not
|
|
* detected, this has a side effect of making CPU run at a different speed
|
|
* than OS intended it to run at. Detect it and handle it cleanly.
|
|
*/
|
|
static int bios_with_sw_any_bug;
|
|
|
|
static int sw_any_bug_found(const struct dmi_system_id *d)
|
|
{
|
|
bios_with_sw_any_bug = 1;
|
|
return 0;
|
|
}
|
|
|
|
static const struct dmi_system_id sw_any_bug_dmi_table[] = {
|
|
{
|
|
.callback = sw_any_bug_found,
|
|
.ident = "Supermicro Server X6DLP",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
|
|
DMI_MATCH(DMI_BIOS_VERSION, "080010"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
|
|
},
|
|
},
|
|
{ }
|
|
};
|
|
|
|
static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
|
|
{
|
|
/* Intel Xeon Processor 7100 Series Specification Update
|
|
* http://www.intel.com/Assets/PDF/specupdate/314554.pdf
|
|
* AL30: A Machine Check Exception (MCE) Occurring during an
|
|
* Enhanced Intel SpeedStep Technology Ratio Change May Cause
|
|
* Both Processor Cores to Lock Up. */
|
|
if (c->x86_vendor == X86_VENDOR_INTEL) {
|
|
if ((c->x86 == 15) &&
|
|
(c->x86_model == 6) &&
|
|
(c->x86_mask == 8)) {
|
|
printk(KERN_INFO "acpi-cpufreq: Intel(R) "
|
|
"Xeon(R) 7100 Errata AL30, processors may "
|
|
"lock up on frequency changes: disabling "
|
|
"acpi-cpufreq.\n");
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
|
|
{
|
|
unsigned int i;
|
|
unsigned int valid_states = 0;
|
|
unsigned int cpu = policy->cpu;
|
|
struct acpi_cpufreq_data *data;
|
|
unsigned int result = 0;
|
|
struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
|
|
struct acpi_processor_performance *perf;
|
|
#ifdef CONFIG_SMP
|
|
static int blacklisted;
|
|
#endif
|
|
|
|
pr_debug("acpi_cpufreq_cpu_init\n");
|
|
|
|
#ifdef CONFIG_SMP
|
|
if (blacklisted)
|
|
return blacklisted;
|
|
blacklisted = acpi_cpufreq_blacklist(c);
|
|
if (blacklisted)
|
|
return blacklisted;
|
|
#endif
|
|
|
|
data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
|
|
per_cpu(acfreq_data, cpu) = data;
|
|
|
|
if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
|
|
acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
|
|
|
|
result = acpi_processor_register_performance(data->acpi_data, cpu);
|
|
if (result)
|
|
goto err_free;
|
|
|
|
perf = data->acpi_data;
|
|
policy->shared_type = perf->shared_type;
|
|
|
|
/*
|
|
* Will let policy->cpus know about dependency only when software
|
|
* coordination is required.
|
|
*/
|
|
if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
|
|
policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
|
|
cpumask_copy(policy->cpus, perf->shared_cpu_map);
|
|
}
|
|
|
|
#ifdef CONFIG_SMP
|
|
dmi_check_system(sw_any_bug_dmi_table);
|
|
if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
|
|
policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
|
|
cpumask_copy(policy->cpus, cpu_core_mask(cpu));
|
|
}
|
|
|
|
if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
|
|
cpumask_clear(policy->cpus);
|
|
cpumask_set_cpu(cpu, policy->cpus);
|
|
policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
|
|
pr_info_once(PFX "overriding BIOS provided _PSD data\n");
|
|
}
|
|
#endif
|
|
|
|
/* capability check */
|
|
if (perf->state_count <= 1) {
|
|
pr_debug("No P-States\n");
|
|
result = -ENODEV;
|
|
goto err_unreg;
|
|
}
|
|
|
|
if (perf->control_register.space_id != perf->status_register.space_id) {
|
|
result = -ENODEV;
|
|
goto err_unreg;
|
|
}
|
|
|
|
switch (perf->control_register.space_id) {
|
|
case ACPI_ADR_SPACE_SYSTEM_IO:
|
|
if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
|
|
boot_cpu_data.x86 == 0xf) {
|
|
pr_debug("AMD K8 systems must use native drivers.\n");
|
|
result = -ENODEV;
|
|
goto err_unreg;
|
|
}
|
|
pr_debug("SYSTEM IO addr space\n");
|
|
data->cpu_feature = SYSTEM_IO_CAPABLE;
|
|
break;
|
|
case ACPI_ADR_SPACE_FIXED_HARDWARE:
|
|
pr_debug("HARDWARE addr space\n");
|
|
if (check_est_cpu(cpu)) {
|
|
data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
|
|
break;
|
|
}
|
|
if (check_amd_hwpstate_cpu(cpu)) {
|
|
data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
|
|
break;
|
|
}
|
|
result = -ENODEV;
|
|
goto err_unreg;
|
|
default:
|
|
pr_debug("Unknown addr space %d\n",
|
|
(u32) (perf->control_register.space_id));
|
|
result = -ENODEV;
|
|
goto err_unreg;
|
|
}
|
|
|
|
data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
|
|
(perf->state_count+1), GFP_KERNEL);
|
|
if (!data->freq_table) {
|
|
result = -ENOMEM;
|
|
goto err_unreg;
|
|
}
|
|
|
|
/* detect transition latency */
|
|
policy->cpuinfo.transition_latency = 0;
|
|
for (i = 0; i < perf->state_count; i++) {
|
|
if ((perf->states[i].transition_latency * 1000) >
|
|
policy->cpuinfo.transition_latency)
|
|
policy->cpuinfo.transition_latency =
|
|
perf->states[i].transition_latency * 1000;
|
|
}
|
|
|
|
/* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
|
|
if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
|
|
policy->cpuinfo.transition_latency > 20 * 1000) {
|
|
policy->cpuinfo.transition_latency = 20 * 1000;
|
|
printk_once(KERN_INFO
|
|
"P-state transition latency capped at 20 uS\n");
|
|
}
|
|
|
|
/* table init */
|
|
for (i = 0; i < perf->state_count; i++) {
|
|
if (i > 0 && perf->states[i].core_frequency >=
|
|
data->freq_table[valid_states-1].frequency / 1000)
|
|
continue;
|
|
|
|
data->freq_table[valid_states].index = i;
|
|
data->freq_table[valid_states].frequency =
|
|
perf->states[i].core_frequency * 1000;
|
|
valid_states++;
|
|
}
|
|
data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
|
|
perf->state = 0;
|
|
|
|
result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
|
|
if (result)
|
|
goto err_freqfree;
|
|
|
|
if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
|
|
printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
|
|
|
|
switch (perf->control_register.space_id) {
|
|
case ACPI_ADR_SPACE_SYSTEM_IO:
|
|
/* Current speed is unknown and not detectable by IO port */
|
|
policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
|
|
break;
|
|
case ACPI_ADR_SPACE_FIXED_HARDWARE:
|
|
acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
|
|
policy->cur = get_cur_freq_on_cpu(cpu);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* notify BIOS that we exist */
|
|
acpi_processor_notify_smm(THIS_MODULE);
|
|
|
|
/* Check for APERF/MPERF support in hardware */
|
|
if (boot_cpu_has(X86_FEATURE_APERFMPERF))
|
|
acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
|
|
|
|
pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
|
|
for (i = 0; i < perf->state_count; i++)
|
|
pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
|
|
(i == perf->state ? '*' : ' '), i,
|
|
(u32) perf->states[i].core_frequency,
|
|
(u32) perf->states[i].power,
|
|
(u32) perf->states[i].transition_latency);
|
|
|
|
cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
|
|
|
|
/*
|
|
* the first call to ->target() should result in us actually
|
|
* writing something to the appropriate registers.
|
|
*/
|
|
data->resume = 1;
|
|
|
|
return result;
|
|
|
|
err_freqfree:
|
|
kfree(data->freq_table);
|
|
err_unreg:
|
|
acpi_processor_unregister_performance(perf, cpu);
|
|
err_free:
|
|
kfree(data);
|
|
per_cpu(acfreq_data, cpu) = NULL;
|
|
|
|
return result;
|
|
}
|
|
|
|
static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
|
|
{
|
|
struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
|
|
|
|
pr_debug("acpi_cpufreq_cpu_exit\n");
|
|
|
|
if (data) {
|
|
cpufreq_frequency_table_put_attr(policy->cpu);
|
|
per_cpu(acfreq_data, policy->cpu) = NULL;
|
|
acpi_processor_unregister_performance(data->acpi_data,
|
|
policy->cpu);
|
|
kfree(data->freq_table);
|
|
kfree(data);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
|
|
{
|
|
struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
|
|
|
|
pr_debug("acpi_cpufreq_resume\n");
|
|
|
|
data->resume = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct freq_attr *acpi_cpufreq_attr[] = {
|
|
&cpufreq_freq_attr_scaling_available_freqs,
|
|
NULL, /* this is a placeholder for cpb, do not remove */
|
|
NULL,
|
|
};
|
|
|
|
static struct cpufreq_driver acpi_cpufreq_driver = {
|
|
.verify = acpi_cpufreq_verify,
|
|
.target = acpi_cpufreq_target,
|
|
.bios_limit = acpi_processor_get_bios_limit,
|
|
.init = acpi_cpufreq_cpu_init,
|
|
.exit = acpi_cpufreq_cpu_exit,
|
|
.resume = acpi_cpufreq_resume,
|
|
.name = "acpi-cpufreq",
|
|
.owner = THIS_MODULE,
|
|
.attr = acpi_cpufreq_attr,
|
|
};
|
|
|
|
static void __init acpi_cpufreq_boost_init(void)
|
|
{
|
|
if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
|
|
msrs = msrs_alloc();
|
|
|
|
if (!msrs)
|
|
return;
|
|
|
|
boost_supported = true;
|
|
boost_enabled = boost_state(0);
|
|
|
|
get_online_cpus();
|
|
|
|
/* Force all MSRs to the same value */
|
|
boost_set_msrs(boost_enabled, cpu_online_mask);
|
|
|
|
register_cpu_notifier(&boost_nb);
|
|
|
|
put_online_cpus();
|
|
} else
|
|
global_boost.attr.mode = 0444;
|
|
|
|
/* We create the boost file in any case, though for systems without
|
|
* hardware support it will be read-only and hardwired to return 0.
|
|
*/
|
|
if (sysfs_create_file(cpufreq_global_kobject, &(global_boost.attr)))
|
|
pr_warn(PFX "could not register global boost sysfs file\n");
|
|
else
|
|
pr_debug("registered global boost sysfs file\n");
|
|
}
|
|
|
|
static void __exit acpi_cpufreq_boost_exit(void)
|
|
{
|
|
sysfs_remove_file(cpufreq_global_kobject, &(global_boost.attr));
|
|
|
|
if (msrs) {
|
|
unregister_cpu_notifier(&boost_nb);
|
|
|
|
msrs_free(msrs);
|
|
msrs = NULL;
|
|
}
|
|
}
|
|
|
|
static int __init acpi_cpufreq_init(void)
|
|
{
|
|
int ret;
|
|
|
|
if (acpi_disabled)
|
|
return 0;
|
|
|
|
pr_debug("acpi_cpufreq_init\n");
|
|
|
|
ret = acpi_cpufreq_early_init();
|
|
if (ret)
|
|
return ret;
|
|
|
|
#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
|
|
/* this is a sysfs file with a strange name and an even stranger
|
|
* semantic - per CPU instantiation, but system global effect.
|
|
* Lets enable it only on AMD CPUs for compatibility reasons and
|
|
* only if configured. This is considered legacy code, which
|
|
* will probably be removed at some point in the future.
|
|
*/
|
|
if (check_amd_hwpstate_cpu(0)) {
|
|
struct freq_attr **iter;
|
|
|
|
pr_debug("adding sysfs entry for cpb\n");
|
|
|
|
for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
|
|
;
|
|
|
|
/* make sure there is a terminator behind it */
|
|
if (iter[1] == NULL)
|
|
*iter = &cpb;
|
|
}
|
|
#endif
|
|
|
|
ret = cpufreq_register_driver(&acpi_cpufreq_driver);
|
|
if (ret)
|
|
free_acpi_perf_data();
|
|
else
|
|
acpi_cpufreq_boost_init();
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit acpi_cpufreq_exit(void)
|
|
{
|
|
pr_debug("acpi_cpufreq_exit\n");
|
|
|
|
acpi_cpufreq_boost_exit();
|
|
|
|
cpufreq_unregister_driver(&acpi_cpufreq_driver);
|
|
|
|
free_acpi_perf_data();
|
|
}
|
|
|
|
module_param(acpi_pstate_strict, uint, 0644);
|
|
MODULE_PARM_DESC(acpi_pstate_strict,
|
|
"value 0 or non-zero. non-zero -> strict ACPI checks are "
|
|
"performed during frequency changes.");
|
|
|
|
late_initcall(acpi_cpufreq_init);
|
|
module_exit(acpi_cpufreq_exit);
|
|
|
|
static const struct x86_cpu_id acpi_cpufreq_ids[] = {
|
|
X86_FEATURE_MATCH(X86_FEATURE_ACPI),
|
|
X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
|
|
|
|
MODULE_ALIAS("acpi");
|