Bogdan Purcareata 8a4fd8778b staging: fsl-dpaa2/eth: Change RX buffer alignment ... The WRIOP hardware block v1.0.0 (found on LS2080A board) requires data in RX buffers to be aligned to 256B, but newer revisions (e.g. on LS2088A, LS1088A) only require 64B alignment. Check WRIOP version and decide at runtime which alignment requirement to configure for ingress buffers. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2017-11-03 16:19:27 +01:00
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ethernet	staging: fsl-dpaa2/eth: Change RX buffer alignment	2017-11-03 16:19:27 +01:00
Kconfig	staging: fsl-mc: allow the driver compile multi-arch	2017-07-30 08:23:28 -07:00
Makefile