de02fc40fc
Newer Rockchip SoCs use a different IP for accessing special one- time-programmable memory, so add a binding for these controllers. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-10-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
26 lines
844 B
Plaintext
26 lines
844 B
Plaintext
Rockchip internal OTP (One Time Programmable) memory device tree bindings
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Required properties:
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- compatible: Should be one of the following.
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- "rockchip,px30-otp" - for PX30 SoCs.
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- "rockchip,rk3308-otp" - for RK3308 SoCs.
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- reg: Should contain the registers location and size
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- clocks: Must contain an entry for each entry in clock-names.
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- clock-names: Should be "otp", "apb_pclk" and "phy".
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- resets: Must contain an entry for each entry in reset-names.
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See ../../reset/reset.txt for details.
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- reset-names: Should be "phy".
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See nvmem.txt for more information.
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Example:
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otp: otp@ff290000 {
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compatible = "rockchip,px30-otp";
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reg = <0x0 0xff290000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
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<&cru PCLK_OTP_PHY>;
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clock-names = "otp", "apb_pclk", "phy";
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};
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