forked from Minki/linux
89c1a8cf63
cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios should be changed to GPIO_ACTIVE_HIGH. Otherwise, the SD may not work properly due to wrong polarity inversion specified in DT after switch to common parsing function mmc_of_parse(). Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
563 lines
14 KiB
Plaintext
563 lines
14 KiB
Plaintext
/*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "imx6sx.dtsi"
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/ {
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model = "Freescale i.MX6 SoloX SDB Board";
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compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
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chosen {
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stdout-path = &uart1;
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};
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memory {
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reg = <0x80000000 0x40000000>;
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm3 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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volume-up {
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label = "Volume Up";
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gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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vcc_sd3: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vcc_sd3>;
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regulator-name = "VCC_SD3";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg1_vbus: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg1>;
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regulator-name = "usb_otg1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg2_vbus: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg2>;
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regulator-name = "usb_otg2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_psu_5v: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "PSU-5V0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_lcd_3v3: regulator@4 {
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compatible = "regulator-fixed";
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reg = <4>;
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regulator-name = "lcd-3v3";
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gpio = <&gpio3 27 0>;
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enable-active-high;
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};
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reg_peri_3v3: regulator@5 {
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compatible = "regulator-fixed";
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reg = <5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_peri_3v3>;
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regulator-name = "peri_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_enet_3v3: regulator@6 {
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compatible = "regulator-fixed";
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reg = <6>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_3v3>;
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regulator-name = "enet_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
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};
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};
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sound {
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compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962";
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model = "wm8962-audio";
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ssi-controller = <&ssi2>;
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audio-codec = <&codec>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"AMIC", "MICBIAS",
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"IN3R", "AMIC";
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mux-int-port = <2>;
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mux-ext-port = <6>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-supply = <®_enet_3v3>;
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phy-mode = "rgmii";
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phy-handle = <ðphy1>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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};
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ethphy2: ethernet-phy@2 {
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reg = <2>;
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};
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};
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};
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&fec2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet2>;
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phy-mode = "rgmii";
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phy-handle = <ðphy2>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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status = "okay";
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codec: wm8962@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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clocks = <&clks IMX6SX_CLK_AUDIO>;
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DCVDD-supply = <&vgen4_reg>;
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DBVDD-supply = <&vgen4_reg>;
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AVDD-supply = <&vgen4_reg>;
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CPVDD-supply = <&vgen4_reg>;
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MICVDD-supply = <&vgen3_reg>;
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PLLVDD-supply = <&vgen4_reg>;
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SPKVDD1-supply = <®_psu_5v>;
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SPKVDD2-supply = <®_psu_5v>;
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};
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};
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&lcdif1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcd>;
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lcd-supply = <®_lcd_3v3>;
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display = <&display0>;
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status = "okay";
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display0: display0 {
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bits-per-pixel = <16>;
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bus-width = <24>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <33500000>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <89>;
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hfront-porch = <164>;
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vback-porch = <23>;
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vfront-porch = <10>;
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hsync-len = <10>;
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vsync-len = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "okay";
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};
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&snvs_poweroff {
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status = "okay";
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};
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&ssi2 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart5 { /* for bluetooth */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&usbotg1 {
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vbus-supply = <®_usb_otg1_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg1_id>;
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status = "okay";
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};
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&usbotg2 {
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vbus-supply = <®_usb_otg2_vbus>;
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dr_mode = "host";
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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non-removable;
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no-1-8-v;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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bus-width = <8>;
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cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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vmmc-supply = <&vcc_sd3>;
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status = "okay";
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};
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&usdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&iomuxc {
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imx6x-sdb {
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0
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MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0
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MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0
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MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0
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MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
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MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
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MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
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MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
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MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
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MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
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MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
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MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
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MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
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MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
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MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
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MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
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MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
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MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
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MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
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>;
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};
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pinctrl_enet_3v3: enet3v3grp {
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fsl,pins = <
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MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000
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>;
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};
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pinctrl_enet2: enet2grp {
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fsl,pins = <
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MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
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MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
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MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
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MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
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MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
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MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
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MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
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MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
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MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
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MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
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MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
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MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
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>;
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};
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pinctrl_gpio_keys: gpio_keysgrp {
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fsl,pins = <
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MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
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MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
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MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1
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MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
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>;
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};
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pinctrl_lcd: lcdgrp {
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fsl,pins = <
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MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
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MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
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MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
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MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
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MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
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MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
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MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
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MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
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MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
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MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
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MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
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MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
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MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
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MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
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MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
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MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
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MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
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MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
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MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
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MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
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MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
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MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
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MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
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MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
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MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
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MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
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MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
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MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
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MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
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>;
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};
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pinctrl_peri_3v3: peri3v3grp {
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fsl,pins = <
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MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
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>;
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};
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pinctrl_pwm3: pwm3grp-1 {
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fsl,pins = <
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MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
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>;
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};
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pinctrl_qspi2: qspi2grp {
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fsl,pins = <
|
|
MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1
|
|
MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1
|
|
MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1
|
|
MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1
|
|
MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1
|
|
MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1
|
|
MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1
|
|
MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1
|
|
MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1
|
|
MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1
|
|
MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1
|
|
MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1
|
|
>;
|
|
};
|
|
|
|
pinctrl_vcc_sd3: vccsd3grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
|
|
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart5: uart5grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
|
|
MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
|
|
MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
|
|
MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usb_otg1: usbotg1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usb_otg1_id: usbotg1idgrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usb_otg2: usbot2ggrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
|
|
MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
|
|
MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
|
|
MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
|
|
MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
|
|
MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
|
|
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
|
|
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
|
|
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
|
|
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
|
|
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
|
|
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
|
|
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
|
|
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
|
|
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
|
|
MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
|
|
MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
|
|
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
|
|
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
|
|
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
|
|
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
|
|
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
|
|
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
|
|
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
|
|
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
|
|
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
|
|
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
|
|
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
|
|
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
|
|
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
|
|
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
|
|
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
|
|
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
|
|
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
|
|
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4: usdhc4grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
|
|
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
|
|
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
|
|
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
|
|
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
|
|
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
|
|
MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
|
|
MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
|
|
>;
|
|
};
|
|
};
|
|
};
|