forked from Minki/linux
36bd168355
phyBOARD-WEGA-AM335x represents a direct soldered combination of a phyCORE-AM335x SoM and carrier board. Different kind of SoM options can be connected to the wega carrier board. So we created a separate wega dtsi file. The final dts contains the actual SoM on the carrier board. WEGA carrier board features: * ETH phy on carrier board: 1x MII * 1x CAN * 2x UART * USB0 (device) * USB1 (host) * mSD slot Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
152 lines
3.6 KiB
Plaintext
152 lines
3.6 KiB
Plaintext
/*
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* Copyright (C) 2015 Phytec Messtechnik GmbH
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* Author: Teresa Remmet <t.remmet@phytec.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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model = "Phytec AM335x phyBOARD-WEGA";
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compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
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};
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/* CAN Busses */
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&am33xx_pinmux {
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dcan1_pins: pinmux_dcan1 {
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pinctrl-single,pins = <
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0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
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0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
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>;
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};
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};
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&dcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&dcan1_pins>;
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status = "okay";
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};
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/* Ethernet */
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&am33xx_pinmux {
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ethernet1_pins: pinmux_ethernet1 {
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pinctrl-single,pins = <
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0x40 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */
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0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */
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0x48 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */
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0x4c (PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */
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0x50 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */
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0x54 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */
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0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */
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0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */
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0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
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0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
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0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
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0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
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0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
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0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */
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>;
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};
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "mii";
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dual_emac_res_vlan = <2>;
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};
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&mac {
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slaves = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <ðernet0_pins ðernet1_pins>;
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dual_emac = <1>;
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};
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/* MMC */
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&am33xx_pinmux {
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mmc1_pins: pinmux_mmc1 {
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pinctrl-single,pins = <
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0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
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0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
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0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
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0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
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0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
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0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
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0x160 (PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
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>;
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};
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};
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&mmc1 {
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vmmc-supply = <&vmmc_reg>;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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/* UARTs */
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&am33xx_pinmux {
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uart0_pins: pinmux_uart0 {
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pinctrl-single,pins = <
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0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
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0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
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0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
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>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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/* USB */
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&cppi41dma {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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&usb0 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb1 {
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dr_mode = "host";
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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