linux/arch/arm64
Will Deacon 880f7cc472 arm64: cpu_errata: Remove ARM64_MISMATCHED_CACHE_LINE_SIZE
There's no need to treat mismatched cache-line sizes reported by CTR_EL0
differently to any other mismatched fields that we treat as "STRICT" in
the cpufeature code. In both cases we need to trap and emulate EL0
accesses to the register, so drop ARM64_MISMATCHED_CACHE_LINE_SIZE and
rely on ARM64_MISMATCHED_CACHE_TYPE instead.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
[catalin.marinas@arm.com: move ARM64_HAS_CNP in the empty cpucaps.h slot]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-09-19 18:21:49 +01:00
..
boot ARM: SoC: late updates 2018-08-25 14:12:36 -07:00
configs arm64: defconfig: Enable TI's AM6 SoC platform 2018-08-29 11:51:26 -07:00
crypto crypto: arm64/aes-gcm-ce - fix scatterwalk API violation 2018-08-25 19:50:43 +08:00
include arm64: cpu_errata: Remove ARM64_MISMATCHED_CACHE_LINE_SIZE 2018-09-19 18:21:49 +01:00
kernel arm64: cpu_errata: Remove ARM64_MISMATCHED_CACHE_LINE_SIZE 2018-09-19 18:21:49 +01:00
kvm arm64: KVM: Enable Common Not Private translations 2018-09-18 12:03:34 +01:00
lib arm64/lib: add accelerated crc32 routines 2018-09-10 16:10:53 +01:00
mm arm64: mm: Support Common Not Private translations 2018-09-18 12:02:27 +01:00
net bpf, arm64: save 4 bytes in prologue when ebpf insns came from cbpf 2018-05-14 19:11:45 -07:00
xen arm64: mm: Add additional parameter to uaccess_ttbr0_disable 2018-01-17 13:57:49 +01:00
Kconfig arm64: mm: Support Common Not Private translations 2018-09-18 12:02:27 +01:00
Kconfig.debug Kconfig: consolidate the "Kernel hacking" menu 2018-08-02 08:06:48 +09:00
Kconfig.platforms ARM: SoC: late updates 2018-08-25 14:12:36 -07:00
Makefile kbuild: rename LDFLAGS to KBUILD_LDFLAGS 2018-08-24 08:22:08 +09:00