forked from Minki/linux
9a4da8a5b1
Support PCI adapter interrupts using the Single-IRQ-mode. Single-IRQ-mode disables an adapter IRQ automatically after delivering it until the SIC instruction enables it again. This is used to reduce the number of IRQs for streaming workloads. Up to 64 MSI handlers can be registered per PCI function. A hash table is used to map interrupt numbers to MSI descriptors. The interrupt vector is scanned using the flogr instruction. Only MSI/MSI-X interrupts are supported, no legacy INTs. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
289 lines
7.7 KiB
C
289 lines
7.7 KiB
C
/*
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* Copyright IBM Corp. 2004, 2011
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Holger Smolinski <Holger.Smolinski@de.ibm.com>,
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* Thomas Spatzier <tspat@de.ibm.com>,
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*
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* This file contains interrupt related functions.
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*/
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/proc_fs.h>
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#include <linux/profile.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/ftrace.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/cpu.h>
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#include <asm/irq_regs.h>
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#include <asm/cputime.h>
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#include <asm/lowcore.h>
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#include <asm/irq.h>
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#include "entry.h"
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struct irq_class {
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char *name;
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char *desc;
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};
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static const struct irq_class intrclass_names[] = {
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[EXTERNAL_INTERRUPT] = {.name = "EXT"},
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[IO_INTERRUPT] = {.name = "I/O"},
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[EXTINT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
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[EXTINT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
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[EXTINT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
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[EXTINT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
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[EXTINT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
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[EXTINT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
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[EXTINT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
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[EXTINT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
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[EXTINT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
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[EXTINT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
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[EXTINT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
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[EXTINT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
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[EXTINT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
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[IOINT_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
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[IOINT_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
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[IOINT_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
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[IOINT_C15] = {.name = "C15", .desc = "[I/O] 3215"},
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[IOINT_C70] = {.name = "C70", .desc = "[I/O] 3270"},
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[IOINT_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
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[IOINT_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
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[IOINT_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
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[IOINT_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
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[IOINT_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
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[IOINT_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
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[IOINT_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
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[IOINT_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
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[IOINT_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
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[IOINT_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
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[NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
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};
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/*
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* show_interrupts is needed by /proc/interrupts.
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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get_online_cpus();
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if (i == 0) {
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seq_puts(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%d ",j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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seq_printf(p, "%s: ", intrclass_names[i].name);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#endif
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if (intrclass_names[i].desc)
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seq_printf(p, " %s", intrclass_names[i].desc);
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seq_putc(p, '\n');
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}
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put_online_cpus();
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return 0;
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}
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/*
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* Switch to the asynchronous interrupt stack for softirq execution.
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*/
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asmlinkage void do_softirq(void)
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{
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unsigned long flags, old, new;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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if (local_softirq_pending()) {
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/* Get current stack pointer. */
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asm volatile("la %0,0(15)" : "=a" (old));
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/* Check against async. stack address range. */
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new = S390_lowcore.async_stack;
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if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
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/* Need to switch to the async. stack. */
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new -= STACK_FRAME_OVERHEAD;
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((struct stack_frame *) new)->back_chain = old;
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asm volatile(" la 15,0(%0)\n"
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" basr 14,%2\n"
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" la 15,0(%1)\n"
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: : "a" (new), "a" (old),
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"a" (__do_softirq)
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: "0", "1", "2", "3", "4", "5", "14",
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"cc", "memory" );
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} else {
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/* We are already on the async stack. */
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__do_softirq();
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}
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}
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local_irq_restore(flags);
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}
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#ifdef CONFIG_PROC_FS
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void init_irq_proc(void)
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{
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struct proc_dir_entry *root_irq_dir;
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root_irq_dir = proc_mkdir("irq", NULL);
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create_prof_cpu_mask(root_irq_dir);
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}
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#endif
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/*
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* ext_int_hash[index] is the list head for all external interrupts that hash
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* to this index.
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*/
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static struct list_head ext_int_hash[256];
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struct ext_int_info {
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ext_int_handler_t handler;
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u16 code;
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struct list_head entry;
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struct rcu_head rcu;
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};
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/* ext_int_hash_lock protects the handler lists for external interrupts */
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DEFINE_SPINLOCK(ext_int_hash_lock);
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static void __init init_external_interrupts(void)
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{
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int idx;
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for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
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INIT_LIST_HEAD(&ext_int_hash[idx]);
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}
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static inline int ext_hash(u16 code)
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{
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return (code + (code >> 9)) & 0xff;
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}
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int register_external_interrupt(u16 code, ext_int_handler_t handler)
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{
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struct ext_int_info *p;
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unsigned long flags;
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int index;
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p = kmalloc(sizeof(*p), GFP_ATOMIC);
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if (!p)
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return -ENOMEM;
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p->code = code;
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p->handler = handler;
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index = ext_hash(code);
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spin_lock_irqsave(&ext_int_hash_lock, flags);
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list_add_rcu(&p->entry, &ext_int_hash[index]);
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spin_unlock_irqrestore(&ext_int_hash_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(register_external_interrupt);
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int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
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{
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struct ext_int_info *p;
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unsigned long flags;
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int index = ext_hash(code);
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spin_lock_irqsave(&ext_int_hash_lock, flags);
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list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
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if (p->code == code && p->handler == handler) {
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list_del_rcu(&p->entry);
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kfree_rcu(p, rcu);
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}
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}
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spin_unlock_irqrestore(&ext_int_hash_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(unregister_external_interrupt);
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void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
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unsigned int param32, unsigned long param64)
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{
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struct pt_regs *old_regs;
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struct ext_int_info *p;
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int index;
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old_regs = set_irq_regs(regs);
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irq_enter();
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if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
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/* Serve timer interrupts first. */
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clock_comparator_work();
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}
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kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
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if (ext_code.code != 0x1004)
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__get_cpu_var(s390_idle).nohz_delay = 1;
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index = ext_hash(ext_code.code);
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rcu_read_lock();
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list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
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if (likely(p->code == ext_code.code))
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p->handler(ext_code, param32, param64);
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rcu_read_unlock();
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irq_exit();
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set_irq_regs(old_regs);
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}
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void __init init_IRQ(void)
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{
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init_external_interrupts();
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}
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static DEFINE_SPINLOCK(sc_irq_lock);
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static int sc_irq_refcount;
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void service_subclass_irq_register(void)
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{
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spin_lock(&sc_irq_lock);
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if (!sc_irq_refcount)
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ctl_set_bit(0, 9);
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sc_irq_refcount++;
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spin_unlock(&sc_irq_lock);
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}
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EXPORT_SYMBOL(service_subclass_irq_register);
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void service_subclass_irq_unregister(void)
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{
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spin_lock(&sc_irq_lock);
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sc_irq_refcount--;
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if (!sc_irq_refcount)
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ctl_clear_bit(0, 9);
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spin_unlock(&sc_irq_lock);
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}
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EXPORT_SYMBOL(service_subclass_irq_unregister);
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static DEFINE_SPINLOCK(ma_subclass_lock);
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static int ma_subclass_refcount;
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void measurement_alert_subclass_register(void)
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{
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spin_lock(&ma_subclass_lock);
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if (!ma_subclass_refcount)
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ctl_set_bit(0, 5);
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ma_subclass_refcount++;
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spin_unlock(&ma_subclass_lock);
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}
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EXPORT_SYMBOL(measurement_alert_subclass_register);
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void measurement_alert_subclass_unregister(void)
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{
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spin_lock(&ma_subclass_lock);
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ma_subclass_refcount--;
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if (!ma_subclass_refcount)
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ctl_clear_bit(0, 5);
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spin_unlock(&ma_subclass_lock);
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}
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EXPORT_SYMBOL(measurement_alert_subclass_unregister);
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