forked from Minki/linux
87f8c98863
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms@verge.net.au>
508 lines
11 KiB
C
508 lines
11 KiB
C
/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DRV_NAME "sh-pfc"
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "core.h"
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static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
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{
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struct resource *res;
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int k;
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if (pdev->num_resources == 0)
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return -EINVAL;
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pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
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sizeof(*pfc->window), GFP_NOWAIT);
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if (!pfc->window)
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return -ENOMEM;
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pfc->num_windows = pdev->num_resources;
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for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
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WARN_ON(resource_type(res) != IORESOURCE_MEM);
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pfc->window[k].phys = res->start;
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pfc->window[k].size = resource_size(res);
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pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
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resource_size(res));
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if (!pfc->window[k].virt)
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return -ENOMEM;
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}
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return 0;
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}
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static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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{
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struct sh_pfc_window *window;
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unsigned int i;
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/* scan through physical windows and convert address */
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for (i = 0; i < pfc->num_windows; i++) {
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window = pfc->window + i;
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if (address < window->phys)
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continue;
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if (address >= (window->phys + window->size))
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continue;
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return window->virt + (address - window->phys);
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}
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BUG();
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return NULL;
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}
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int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
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{
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unsigned int offset;
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unsigned int i;
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if (pfc->info->ranges == NULL)
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return pin;
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for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
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const struct pinmux_range *range = &pfc->info->ranges[i];
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if (pin <= range->end)
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return pin >= range->begin
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? offset + pin - range->begin : -1;
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offset += range->end - range->begin + 1;
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}
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return -EINVAL;
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}
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static int sh_pfc_enum_in_range(pinmux_enum_t enum_id,
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const struct pinmux_range *r)
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{
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if (enum_id < r->begin)
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return 0;
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if (enum_id > r->end)
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return 0;
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return 1;
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}
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unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width)
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{
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switch (reg_width) {
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case 8:
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return ioread8(mapped_reg);
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case 16:
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return ioread16(mapped_reg);
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case 32:
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return ioread32(mapped_reg);
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}
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BUG();
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return 0;
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}
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void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
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unsigned long data)
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{
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switch (reg_width) {
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case 8:
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iowrite8(data, mapped_reg);
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return;
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case 16:
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iowrite16(data, mapped_reg);
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return;
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case 32:
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iowrite32(data, mapped_reg);
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return;
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}
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BUG();
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}
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static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
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const struct pinmux_cfg_reg *crp,
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unsigned long in_pos,
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void __iomem **mapped_regp,
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unsigned long *maskp,
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unsigned long *posp)
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{
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int k;
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*mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
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if (crp->field_width) {
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*maskp = (1 << crp->field_width) - 1;
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*posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
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} else {
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*maskp = (1 << crp->var_field_width[in_pos]) - 1;
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*posp = crp->reg_width;
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for (k = 0; k <= in_pos; k++)
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*posp -= crp->var_field_width[k];
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}
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}
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static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
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const struct pinmux_cfg_reg *crp,
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unsigned long field, unsigned long value)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos, data;
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sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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dev_dbg(pfc->dev, "write_reg addr = %lx, value = %ld, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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crp->reg, value, field, crp->reg_width, crp->field_width);
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mask = ~(mask << pos);
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value = value << pos;
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data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
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data &= mask;
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data |= value;
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if (pfc->info->unlock_reg)
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sh_pfc_write_raw_reg(
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sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
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~data);
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sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
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}
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static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
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const struct pinmux_cfg_reg **crp, int *fieldp,
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int *valuep)
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{
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const struct pinmux_cfg_reg *config_reg;
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unsigned long r_width, f_width, curr_width, ncomb;
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int k, m, n, pos, bit_pos;
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k = 0;
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while (1) {
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config_reg = pfc->info->cfg_regs + k;
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r_width = config_reg->reg_width;
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f_width = config_reg->field_width;
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if (!r_width)
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break;
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pos = 0;
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m = 0;
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for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
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if (f_width)
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curr_width = f_width;
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else
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curr_width = config_reg->var_field_width[m];
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ncomb = 1 << curr_width;
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for (n = 0; n < ncomb; n++) {
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if (config_reg->enum_ids[pos + n] == enum_id) {
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*crp = config_reg;
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*fieldp = m;
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*valuep = n;
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return 0;
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}
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}
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pos += ncomb;
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m++;
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}
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k++;
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}
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return -EINVAL;
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}
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static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
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pinmux_enum_t *enum_idp)
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{
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const pinmux_enum_t *data = pfc->info->gpio_data;
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int k;
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if (pos) {
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*enum_idp = data[pos + 1];
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return pos + 1;
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}
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for (k = 0; k < pfc->info->gpio_data_size; k++) {
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if (data[k] == mark) {
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*enum_idp = data[k + 1];
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return k + 1;
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}
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}
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dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n",
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mark);
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return -EINVAL;
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}
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int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
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{
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const struct pinmux_cfg_reg *cr = NULL;
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pinmux_enum_t enum_id;
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const struct pinmux_range *range;
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int in_range, pos, field, value;
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int ret;
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switch (pinmux_type) {
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case PINMUX_TYPE_GPIO:
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case PINMUX_TYPE_FUNCTION:
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range = NULL;
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break;
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case PINMUX_TYPE_OUTPUT:
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range = &pfc->info->output;
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break;
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case PINMUX_TYPE_INPUT:
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range = &pfc->info->input;
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break;
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case PINMUX_TYPE_INPUT_PULLUP:
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range = &pfc->info->input_pu;
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break;
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case PINMUX_TYPE_INPUT_PULLDOWN:
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range = &pfc->info->input_pd;
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break;
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default:
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return -EINVAL;
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}
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pos = 0;
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enum_id = 0;
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field = 0;
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value = 0;
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/* Iterate over all the configuration fields we need to update. */
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while (1) {
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pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);
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if (pos < 0)
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return pos;
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if (!enum_id)
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break;
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/* Check if the configuration field selects a function. If it
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* doesn't, skip the field if it's not applicable to the
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* requested pinmux type.
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*/
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in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function);
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if (!in_range) {
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if (pinmux_type == PINMUX_TYPE_FUNCTION) {
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/* Functions are allowed to modify all
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* fields.
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*/
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in_range = 1;
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} else if (pinmux_type != PINMUX_TYPE_GPIO) {
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/* Input/output types can only modify fields
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* that correspond to their respective ranges.
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*/
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in_range = sh_pfc_enum_in_range(enum_id, range);
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/*
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* special case pass through for fixed
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* input-only or output-only pins without
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* function enum register association.
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*/
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if (in_range && enum_id == range->force)
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continue;
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}
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/* GPIOs are only allowed to modify function fields. */
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}
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if (!in_range)
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continue;
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ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value);
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if (ret < 0)
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return ret;
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sh_pfc_write_config_reg(pfc, cr, field, value);
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}
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return 0;
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}
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static int sh_pfc_probe(struct platform_device *pdev)
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{
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const struct sh_pfc_soc_info *info;
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struct sh_pfc *pfc;
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int ret;
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info = pdev->id_entry->driver_data
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? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
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if (info == NULL)
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return -ENODEV;
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pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL);
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if (pfc == NULL)
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return -ENOMEM;
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pfc->info = info;
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pfc->dev = &pdev->dev;
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ret = sh_pfc_ioremap(pfc, pdev);
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if (unlikely(ret < 0))
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return ret;
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spin_lock_init(&pfc->lock);
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pinctrl_provide_dummies();
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/*
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* Initialize pinctrl bindings first
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*/
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ret = sh_pfc_register_pinctrl(pfc);
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if (unlikely(ret != 0))
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return ret;
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#ifdef CONFIG_GPIO_SH_PFC
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/*
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* Then the GPIO chip
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*/
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ret = sh_pfc_register_gpiochip(pfc);
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if (unlikely(ret != 0)) {
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/*
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* If the GPIO chip fails to come up we still leave the
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* PFC state as it is, given that there are already
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* extant users of it that have succeeded by this point.
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*/
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dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n");
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}
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#endif
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platform_set_drvdata(pdev, pfc);
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dev_info(pfc->dev, "%s support registered\n", info->name);
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return 0;
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}
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static int sh_pfc_remove(struct platform_device *pdev)
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{
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struct sh_pfc *pfc = platform_get_drvdata(pdev);
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#ifdef CONFIG_GPIO_SH_PFC
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sh_pfc_unregister_gpiochip(pfc);
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#endif
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sh_pfc_unregister_pinctrl(pfc);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static const struct platform_device_id sh_pfc_id_table[] = {
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#ifdef CONFIG_PINCTRL_PFC_R8A73A4
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{ "pfc-r8a73a4", (kernel_ulong_t)&r8a73a4_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7740
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{ "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7778
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{ "pfc-r8a7778", (kernel_ulong_t)&r8a7778_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7779
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{ "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7790
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{ "pfc-r8a7790", (kernel_ulong_t)&r8a7790_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7203
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{ "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7264
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{ "pfc-sh7264", (kernel_ulong_t)&sh7264_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7269
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{ "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7372
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{ "pfc-sh7372", (kernel_ulong_t)&sh7372_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH73A0
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{ "pfc-sh73a0", (kernel_ulong_t)&sh73a0_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7720
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{ "pfc-sh7720", (kernel_ulong_t)&sh7720_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7722
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{ "pfc-sh7722", (kernel_ulong_t)&sh7722_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7723
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{ "pfc-sh7723", (kernel_ulong_t)&sh7723_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7724
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{ "pfc-sh7724", (kernel_ulong_t)&sh7724_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7734
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{ "pfc-sh7734", (kernel_ulong_t)&sh7734_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7757
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{ "pfc-sh7757", (kernel_ulong_t)&sh7757_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7785
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{ "pfc-sh7785", (kernel_ulong_t)&sh7785_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7786
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{ "pfc-sh7786", (kernel_ulong_t)&sh7786_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SHX3
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{ "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },
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#endif
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{ "sh-pfc", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(platform, sh_pfc_id_table);
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static struct platform_driver sh_pfc_driver = {
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.probe = sh_pfc_probe,
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.remove = sh_pfc_remove,
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.id_table = sh_pfc_id_table,
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init sh_pfc_init(void)
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{
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return platform_driver_register(&sh_pfc_driver);
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}
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postcore_initcall(sh_pfc_init);
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static void __exit sh_pfc_exit(void)
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{
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platform_driver_unregister(&sh_pfc_driver);
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}
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module_exit(sh_pfc_exit);
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MODULE_AUTHOR("Magnus Damm, Paul Mundt, Laurent Pinchart");
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MODULE_DESCRIPTION("Pin Control and GPIO driver for SuperH pin function controller");
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MODULE_LICENSE("GPL v2");
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