forked from Minki/linux
0d9179fb33
Now that the Armada 370/375/38x/XP SoC-level Device Tree files have the proper "clocks" property in their UART controllers node, it is no longer useful to have the clock-frequency property defined in the board-level Device Tree files. Therefore, this commit gets rid of all the useless 'clock-frequency' properties. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
77 lines
1.4 KiB
Plaintext
77 lines
1.4 KiB
Plaintext
/*
|
|
* Device Tree file for Marvell Armada XP Matrix board
|
|
*
|
|
* Copyright (C) 2013 Marvell
|
|
*
|
|
* Lior Amsalem <alior@marvell.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "armada-xp-mv78460.dtsi"
|
|
|
|
/ {
|
|
model = "Marvell Armada XP Matrix Board";
|
|
compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200 earlyprintk";
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
/*
|
|
* This board has 4 GB of RAM, but the last 256 MB of
|
|
* RAM are not usable due to the overlap with the MBus
|
|
* Window address range
|
|
*/
|
|
reg = <0 0x00000000 0 0xf0000000>;
|
|
};
|
|
|
|
soc {
|
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
|
|
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
|
|
|
|
internal-regs {
|
|
serial@12000 {
|
|
status = "okay";
|
|
};
|
|
serial@12100 {
|
|
status = "okay";
|
|
};
|
|
serial@12200 {
|
|
status = "okay";
|
|
};
|
|
serial@12300 {
|
|
status = "okay";
|
|
};
|
|
|
|
sata@a0000 {
|
|
nr-ports = <2>;
|
|
status = "okay";
|
|
};
|
|
|
|
ethernet@30000 {
|
|
status = "okay";
|
|
phy-mode = "sgmii";
|
|
};
|
|
|
|
pcie-controller {
|
|
status = "okay";
|
|
|
|
pcie@1,0 {
|
|
/* Port 0, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
usb@50000 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
};
|