Jun Lei 8775e89fa7 drm/amd/display: do not synchronize "drr" displays ... [why] A display that supports DRR can never really be considered "synchronized" with any other display because we can dynamically enable DRR (i.e. without modeset). this will cause their relative CRTC positions to drift and lose sync. this will disrupt features such as MCLK switching that assume and depend on their permanent alignment (that can only change with modeset) [how] check for ignore_msa in stream when considered synchronizability this ignore_msa is basically actually implemented as "supports drr" Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-10-30 11:56:15 -04:00
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acp	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
amdgpu	drm/amdgpu: If amdgpu_ib_schedule fails return back the error.	2019-10-30 11:56:15 -04:00
amdkfd	drm fixes for 5.4-rc1	2019-09-27 11:13:35 -07:00
display	drm/amd/display: do not synchronize "drr" displays	2019-10-30 11:56:15 -04:00
include	drm/amd/display: update renoir_ip_offset.h	2019-09-17 14:22:29 -05:00
powerplay	drm/amdgpu/powerplay: fix typo in mvdd table setup	2019-10-09 11:46:20 -05:00