forked from Minki/linux
f7d12ef53d
This patch finally adds a Device Tree binding to the mv_xor driver. Thanks to the previous cleanup patches, the Device Tree binding is relatively simply: one DT node per XOR engine, with sub-nodes for each XOR channel of the XOR engine. The binding obviously comes with the necessary documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: devicetree-discuss@lists.ozlabs.org
41 lines
1.1 KiB
Plaintext
41 lines
1.1 KiB
Plaintext
* Marvell XOR engines
|
|
|
|
Required properties:
|
|
- compatible: Should be "marvell,orion-xor"
|
|
- reg: Should contain registers location and length (two sets)
|
|
the first set is the low registers, the second set the high
|
|
registers for the XOR engine.
|
|
- clocks: pointer to the reference clock
|
|
|
|
The DT node must also contains sub-nodes for each XOR channel that the
|
|
XOR engine has. Those sub-nodes have the following required
|
|
properties:
|
|
- interrupts: interrupt of the XOR channel
|
|
|
|
And the following optional properties:
|
|
- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
|
|
- dmacap,memset to indicate that the XOR channel is capable of memset operations
|
|
- dmacap,xor to indicate that the XOR channel is capable of xor operations
|
|
|
|
Example:
|
|
|
|
xor@d0060900 {
|
|
compatible = "marvell,orion-xor";
|
|
reg = <0xd0060900 0x100
|
|
0xd0060b00 0x100>;
|
|
clocks = <&coreclk 0>;
|
|
status = "okay";
|
|
|
|
xor00 {
|
|
interrupts = <51>;
|
|
dmacap,memcpy;
|
|
dmacap,xor;
|
|
};
|
|
xor01 {
|
|
interrupts = <52>;
|
|
dmacap,memcpy;
|
|
dmacap,xor;
|
|
dmacap,memset;
|
|
};
|
|
};
|