forked from Minki/linux
871039f02f
Conflicts: drivers/net/stmmac/stmmac_main.c drivers/net/wireless/wl12xx/wl1271_cmd.c drivers/net/wireless/wl12xx/wl1271_main.c drivers/net/wireless/wl12xx/wl1271_spi.c net/core/ethtool.c net/mac80211/scan.c
1291 lines
39 KiB
C
1291 lines
39 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
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*
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* Portions of this file are derived from the ipw3945 project, as well
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* as portions of the ieee80211 subsystem header files.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/etherdevice.h>
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#include <linux/slab.h>
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#include <net/mac80211.h>
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#include <asm/unaligned.h>
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#include "iwl-eeprom.h"
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#include "iwl-dev.h"
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#include "iwl-core.h"
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#include "iwl-sta.h"
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#include "iwl-io.h"
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#include "iwl-calib.h"
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#include "iwl-helpers.h"
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/************************** RX-FUNCTIONS ****************************/
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/*
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* Rx theory of operation
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*
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* Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
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* each of which point to Receive Buffers to be filled by the NIC. These get
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* used not only for Rx frames, but for any command response or notification
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* from the NIC. The driver and NIC manage the Rx buffers by means
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* of indexes into the circular buffer.
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*
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* Rx Queue Indexes
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* The host/firmware share two index registers for managing the Rx buffers.
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*
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* The READ index maps to the first position that the firmware may be writing
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* to -- the driver can read up to (but not including) this position and get
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* good data.
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* The READ index is managed by the firmware once the card is enabled.
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*
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* The WRITE index maps to the last position the driver has read from -- the
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* position preceding WRITE is the last slot the firmware can place a packet.
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*
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* The queue is empty (no good data) if WRITE = READ - 1, and is full if
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* WRITE = READ.
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*
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* During initialization, the host sets up the READ queue position to the first
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* INDEX position, and WRITE to the last (READ - 1 wrapped)
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*
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* When the firmware places a packet in a buffer, it will advance the READ index
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* and fire the RX interrupt. The driver can then query the READ index and
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* process as many packets as possible, moving the WRITE index forward as it
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* resets the Rx queue buffers with new memory.
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*
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* The management in the driver is as follows:
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* + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
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* iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
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* to replenish the iwl->rxq->rx_free.
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* + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
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* iwl->rxq is replenished and the READ INDEX is updated (updating the
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* 'processed' and 'read' driver indexes as well)
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* + A received packet is processed and handed to the kernel network stack,
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* detached from the iwl->rxq. The driver 'processed' index is updated.
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* + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
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* list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
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* INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
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* were enough free buffers and RX_STALLED is set it is cleared.
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*
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*
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* Driver sequence:
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*
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* iwl_rx_queue_alloc() Allocates rx_free
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* iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
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* iwl_rx_queue_restock
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* iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
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* queue, updates firmware pointers, and updates
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* the WRITE index. If insufficient rx_free buffers
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* are available, schedules iwl_rx_replenish
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*
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* -- enable interrupts --
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* ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
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* READ INDEX, detaching the SKB from the pool.
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* Moves the packet buffer from queue to rx_used.
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* Calls iwl_rx_queue_restock to refill any empty
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* slots.
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* ...
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*
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*/
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/**
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* iwl_rx_queue_space - Return number of free slots available in queue.
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*/
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int iwl_rx_queue_space(const struct iwl_rx_queue *q)
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{
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int s = q->read - q->write;
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if (s <= 0)
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s += RX_QUEUE_SIZE;
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/* keep some buffer to not confuse full and empty queue */
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s -= 2;
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if (s < 0)
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s = 0;
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return s;
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}
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EXPORT_SYMBOL(iwl_rx_queue_space);
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/**
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* iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
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*/
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void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
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{
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unsigned long flags;
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u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
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u32 reg;
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spin_lock_irqsave(&q->lock, flags);
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if (q->need_update == 0)
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goto exit_unlock;
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/* If power-saving is in use, make sure device is awake */
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if (test_bit(STATUS_POWER_PMI, &priv->status)) {
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reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
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if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
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reg);
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iwl_set_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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goto exit_unlock;
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}
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q->write_actual = (q->write & ~0x7);
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iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
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/* Else device is assumed to be awake */
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} else {
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/* Device expects a multiple of 8 */
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q->write_actual = (q->write & ~0x7);
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iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
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}
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q->need_update = 0;
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exit_unlock:
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spin_unlock_irqrestore(&q->lock, flags);
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}
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EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
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/**
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* iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
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*/
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static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
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dma_addr_t dma_addr)
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{
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return cpu_to_le32((u32)(dma_addr >> 8));
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}
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/**
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* iwl_rx_queue_restock - refill RX queue from pre-allocated pool
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*
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* If there are slots in the RX queue that need to be restocked,
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* and we have free pre-allocated buffers, fill the ranks as much
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* as we can, pulling from rx_free.
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*
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* This moves the 'write' index forward to catch up with 'processed', and
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* also updates the memory address in the firmware to reference the new
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* target buffer.
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*/
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void iwl_rx_queue_restock(struct iwl_priv *priv)
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{
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struct iwl_rx_queue *rxq = &priv->rxq;
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struct list_head *element;
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struct iwl_rx_mem_buffer *rxb;
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unsigned long flags;
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int write;
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spin_lock_irqsave(&rxq->lock, flags);
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write = rxq->write & ~0x7;
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while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
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/* Get next free Rx buffer, remove from free list */
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element = rxq->rx_free.next;
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rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
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list_del(element);
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/* Point to Rx buffer via next RBD in circular buffer */
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rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
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rxq->queue[rxq->write] = rxb;
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rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
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rxq->free_count--;
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}
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spin_unlock_irqrestore(&rxq->lock, flags);
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/* If the pre-allocated buffer pool is dropping low, schedule to
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* refill it */
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if (rxq->free_count <= RX_LOW_WATERMARK)
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queue_work(priv->workqueue, &priv->rx_replenish);
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/* If we've added more space for the firmware to place data, tell it.
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* Increment device's write pointer in multiples of 8. */
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if (rxq->write_actual != (rxq->write & ~0x7)) {
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spin_lock_irqsave(&rxq->lock, flags);
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rxq->need_update = 1;
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spin_unlock_irqrestore(&rxq->lock, flags);
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iwl_rx_queue_update_write_ptr(priv, rxq);
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}
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}
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EXPORT_SYMBOL(iwl_rx_queue_restock);
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/**
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* iwl_rx_replenish - Move all used packet from rx_used to rx_free
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*
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* When moving to rx_free an SKB is allocated for the slot.
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*
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* Also restock the Rx queue via iwl_rx_queue_restock.
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* This is called as a scheduled work item (except for during initialization)
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*/
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void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
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{
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struct iwl_rx_queue *rxq = &priv->rxq;
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struct list_head *element;
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struct iwl_rx_mem_buffer *rxb;
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struct page *page;
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unsigned long flags;
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gfp_t gfp_mask = priority;
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while (1) {
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spin_lock_irqsave(&rxq->lock, flags);
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if (list_empty(&rxq->rx_used)) {
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spin_unlock_irqrestore(&rxq->lock, flags);
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return;
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}
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spin_unlock_irqrestore(&rxq->lock, flags);
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if (rxq->free_count > RX_LOW_WATERMARK)
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gfp_mask |= __GFP_NOWARN;
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if (priv->hw_params.rx_page_order > 0)
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gfp_mask |= __GFP_COMP;
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/* Alloc a new receive buffer */
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page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
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if (!page) {
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if (net_ratelimit())
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IWL_DEBUG_INFO(priv, "alloc_pages failed, "
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"order: %d\n",
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priv->hw_params.rx_page_order);
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if ((rxq->free_count <= RX_LOW_WATERMARK) &&
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net_ratelimit())
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IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
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priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
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rxq->free_count);
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/* We don't reschedule replenish work here -- we will
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* call the restock method and if it still needs
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* more buffers it will schedule replenish */
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return;
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}
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spin_lock_irqsave(&rxq->lock, flags);
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if (list_empty(&rxq->rx_used)) {
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spin_unlock_irqrestore(&rxq->lock, flags);
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__free_pages(page, priv->hw_params.rx_page_order);
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return;
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}
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element = rxq->rx_used.next;
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rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
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list_del(element);
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spin_unlock_irqrestore(&rxq->lock, flags);
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rxb->page = page;
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/* Get physical address of the RB */
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rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
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PAGE_SIZE << priv->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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/* dma address must be no more than 36 bits */
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BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
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/* and also 256 byte aligned! */
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BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
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spin_lock_irqsave(&rxq->lock, flags);
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list_add_tail(&rxb->list, &rxq->rx_free);
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rxq->free_count++;
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priv->alloc_rxb_page++;
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spin_unlock_irqrestore(&rxq->lock, flags);
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}
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}
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void iwl_rx_replenish(struct iwl_priv *priv)
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{
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unsigned long flags;
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iwl_rx_allocate(priv, GFP_KERNEL);
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spin_lock_irqsave(&priv->lock, flags);
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iwl_rx_queue_restock(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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EXPORT_SYMBOL(iwl_rx_replenish);
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void iwl_rx_replenish_now(struct iwl_priv *priv)
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{
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iwl_rx_allocate(priv, GFP_ATOMIC);
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iwl_rx_queue_restock(priv);
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}
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EXPORT_SYMBOL(iwl_rx_replenish_now);
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/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
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* If an SKB has been detached, the POOL needs to have its SKB set to NULL
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* This free routine walks the list of POOL entries and if SKB is set to
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* non NULL it is unmapped and freed
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*/
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void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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{
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int i;
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for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
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if (rxq->pool[i].page != NULL) {
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pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
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PAGE_SIZE << priv->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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__iwl_free_pages(priv, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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}
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dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
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rxq->dma_addr);
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dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
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rxq->rb_stts, rxq->rb_stts_dma);
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rxq->bd = NULL;
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rxq->rb_stts = NULL;
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}
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EXPORT_SYMBOL(iwl_rx_queue_free);
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int iwl_rx_queue_alloc(struct iwl_priv *priv)
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{
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struct iwl_rx_queue *rxq = &priv->rxq;
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struct device *dev = &priv->pci_dev->dev;
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int i;
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spin_lock_init(&rxq->lock);
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INIT_LIST_HEAD(&rxq->rx_free);
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INIT_LIST_HEAD(&rxq->rx_used);
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/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
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rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr,
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GFP_KERNEL);
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if (!rxq->bd)
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goto err_bd;
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rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
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&rxq->rb_stts_dma, GFP_KERNEL);
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if (!rxq->rb_stts)
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goto err_rb;
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/* Fill the rx_used queue with _all_ of the Rx buffers */
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for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
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list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
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/* Set us so that we have processed and used all buffers, but have
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* not restocked the Rx queue with fresh buffers */
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rxq->read = rxq->write = 0;
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rxq->write_actual = 0;
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rxq->free_count = 0;
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rxq->need_update = 0;
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return 0;
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err_rb:
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dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
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rxq->dma_addr);
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err_bd:
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return -ENOMEM;
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}
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EXPORT_SYMBOL(iwl_rx_queue_alloc);
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void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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{
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unsigned long flags;
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int i;
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spin_lock_irqsave(&rxq->lock, flags);
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INIT_LIST_HEAD(&rxq->rx_free);
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INIT_LIST_HEAD(&rxq->rx_used);
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/* Fill the rx_used queue with _all_ of the Rx buffers */
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for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
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/* In the reset function, these buffers may have been allocated
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* to an SKB, so we need to unmap and free potential storage */
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if (rxq->pool[i].page != NULL) {
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pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
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PAGE_SIZE << priv->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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__iwl_free_pages(priv, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
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}
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/* Set us so that we have processed and used all buffers, but have
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* not restocked the Rx queue with fresh buffers */
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rxq->read = rxq->write = 0;
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rxq->write_actual = 0;
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rxq->free_count = 0;
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spin_unlock_irqrestore(&rxq->lock, flags);
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}
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|
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int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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{
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u32 rb_size;
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const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
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u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
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if (!priv->cfg->use_isr_legacy)
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rb_timeout = RX_RB_TIMEOUT;
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if (priv->cfg->mod_params->amsdu_size_8K)
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rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
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else
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rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
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/* Stop Rx DMA */
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iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
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/* Reset driver's Rx queue write index */
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iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
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|
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/* Tell device where to find RBD circular buffer in DRAM */
|
|
iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
|
|
(u32)(rxq->dma_addr >> 8));
|
|
|
|
/* Tell device where in DRAM to update its Rx status */
|
|
iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
|
|
rxq->rb_stts_dma >> 4);
|
|
|
|
/* Enable Rx DMA
|
|
* FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
|
|
* the credit mechanism in 5000 HW RX FIFO
|
|
* Direct rx interrupts to hosts
|
|
* Rx buffer size 4 or 8k
|
|
* RB timeout 0x10
|
|
* 256 RBDs
|
|
*/
|
|
iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
|
|
FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
|
|
FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
|
|
FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
|
|
FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
|
|
rb_size|
|
|
(rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
|
|
(rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
|
|
|
|
/* Set interrupt coalescing timer to default (2048 usecs) */
|
|
iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int iwl_rxq_stop(struct iwl_priv *priv)
|
|
{
|
|
|
|
/* stop Rx DMA */
|
|
iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
|
|
iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
|
|
FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(iwl_rxq_stop);
|
|
|
|
void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
|
|
struct iwl_rx_mem_buffer *rxb)
|
|
|
|
{
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
struct iwl_missed_beacon_notif *missed_beacon;
|
|
|
|
missed_beacon = &pkt->u.missed_beacon;
|
|
if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
|
|
priv->missed_beacon_threshold) {
|
|
IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
|
|
le32_to_cpu(missed_beacon->consecutive_missed_beacons),
|
|
le32_to_cpu(missed_beacon->total_missed_becons),
|
|
le32_to_cpu(missed_beacon->num_recvd_beacons),
|
|
le32_to_cpu(missed_beacon->num_expected_beacons));
|
|
if (!test_bit(STATUS_SCANNING, &priv->status))
|
|
iwl_init_sensitivity(priv);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
|
|
|
|
void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
|
|
struct iwl_rx_mem_buffer *rxb)
|
|
{
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
|
|
|
|
if (!report->state) {
|
|
IWL_DEBUG_11H(priv,
|
|
"Spectrum Measure Notification: Start\n");
|
|
return;
|
|
}
|
|
|
|
memcpy(&priv->measure_report, report, sizeof(*report));
|
|
priv->measurement_status |= MEASUREMENT_READY;
|
|
}
|
|
EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
|
|
|
|
|
|
|
|
/* Calculate noise level, based on measurements during network silence just
|
|
* before arriving beacon. This measurement can be done only if we know
|
|
* exactly when to expect beacons, therefore only when we're associated. */
|
|
static void iwl_rx_calc_noise(struct iwl_priv *priv)
|
|
{
|
|
struct statistics_rx_non_phy *rx_info
|
|
= &(priv->statistics.rx.general);
|
|
int num_active_rx = 0;
|
|
int total_silence = 0;
|
|
int bcn_silence_a =
|
|
le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
|
|
int bcn_silence_b =
|
|
le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
|
|
int bcn_silence_c =
|
|
le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
|
|
|
|
if (bcn_silence_a) {
|
|
total_silence += bcn_silence_a;
|
|
num_active_rx++;
|
|
}
|
|
if (bcn_silence_b) {
|
|
total_silence += bcn_silence_b;
|
|
num_active_rx++;
|
|
}
|
|
if (bcn_silence_c) {
|
|
total_silence += bcn_silence_c;
|
|
num_active_rx++;
|
|
}
|
|
|
|
/* Average among active antennas */
|
|
if (num_active_rx)
|
|
priv->last_rx_noise = (total_silence / num_active_rx) - 107;
|
|
else
|
|
priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
|
|
|
|
IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
|
|
bcn_silence_a, bcn_silence_b, bcn_silence_c,
|
|
priv->last_rx_noise);
|
|
}
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUG
|
|
/*
|
|
* based on the assumption of all statistics counter are in DWORD
|
|
* FIXME: This function is for debugging, do not deal with
|
|
* the case of counters roll-over.
|
|
*/
|
|
static void iwl_accumulative_statistics(struct iwl_priv *priv,
|
|
__le32 *stats)
|
|
{
|
|
int i;
|
|
__le32 *prev_stats;
|
|
u32 *accum_stats;
|
|
u32 *delta, *max_delta;
|
|
|
|
prev_stats = (__le32 *)&priv->statistics;
|
|
accum_stats = (u32 *)&priv->accum_statistics;
|
|
delta = (u32 *)&priv->delta_statistics;
|
|
max_delta = (u32 *)&priv->max_delta;
|
|
|
|
for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
|
|
i += sizeof(__le32), stats++, prev_stats++, delta++,
|
|
max_delta++, accum_stats++) {
|
|
if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
|
|
*delta = (le32_to_cpu(*stats) -
|
|
le32_to_cpu(*prev_stats));
|
|
*accum_stats += *delta;
|
|
if (*delta > *max_delta)
|
|
*max_delta = *delta;
|
|
}
|
|
}
|
|
|
|
/* reset accumulative statistics for "no-counter" type statistics */
|
|
priv->accum_statistics.general.temperature =
|
|
priv->statistics.general.temperature;
|
|
priv->accum_statistics.general.temperature_m =
|
|
priv->statistics.general.temperature_m;
|
|
priv->accum_statistics.general.ttl_timestamp =
|
|
priv->statistics.general.ttl_timestamp;
|
|
priv->accum_statistics.tx.tx_power.ant_a =
|
|
priv->statistics.tx.tx_power.ant_a;
|
|
priv->accum_statistics.tx.tx_power.ant_b =
|
|
priv->statistics.tx.tx_power.ant_b;
|
|
priv->accum_statistics.tx.tx_power.ant_c =
|
|
priv->statistics.tx.tx_power.ant_c;
|
|
}
|
|
#endif
|
|
|
|
#define REG_RECALIB_PERIOD (60)
|
|
|
|
/* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
|
|
#define ACK_CNT_RATIO (50)
|
|
#define BA_TIMEOUT_CNT (5)
|
|
#define BA_TIMEOUT_MAX (16)
|
|
|
|
#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
|
|
/**
|
|
* iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
|
|
*
|
|
* When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
|
|
* the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
|
|
* operation state.
|
|
*/
|
|
bool iwl_good_ack_health(struct iwl_priv *priv,
|
|
struct iwl_rx_packet *pkt)
|
|
{
|
|
bool rc = true;
|
|
int actual_ack_cnt_delta, expected_ack_cnt_delta;
|
|
int ba_timeout_delta;
|
|
|
|
actual_ack_cnt_delta =
|
|
le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
|
|
le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
|
|
expected_ack_cnt_delta =
|
|
le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
|
|
le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
|
|
ba_timeout_delta =
|
|
le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
|
|
le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
|
|
if ((priv->_agn.agg_tids_count > 0) &&
|
|
(expected_ack_cnt_delta > 0) &&
|
|
(((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
|
|
< ACK_CNT_RATIO) &&
|
|
(ba_timeout_delta > BA_TIMEOUT_CNT)) {
|
|
IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
|
|
" expected_ack_cnt = %d\n",
|
|
actual_ack_cnt_delta, expected_ack_cnt_delta);
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUG
|
|
IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
|
|
priv->delta_statistics.tx.rx_detected_cnt);
|
|
IWL_DEBUG_RADIO(priv,
|
|
"ack_or_ba_timeout_collision delta = %d\n",
|
|
priv->delta_statistics.tx.
|
|
ack_or_ba_timeout_collision);
|
|
#endif
|
|
IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
|
|
ba_timeout_delta);
|
|
if (!actual_ack_cnt_delta &&
|
|
(ba_timeout_delta >= BA_TIMEOUT_MAX))
|
|
rc = false;
|
|
}
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(iwl_good_ack_health);
|
|
#endif
|
|
|
|
/**
|
|
* iwl_good_plcp_health - checks for plcp error.
|
|
*
|
|
* When the plcp error is exceeding the thresholds, reset the radio
|
|
* to improve the throughput.
|
|
*/
|
|
bool iwl_good_plcp_health(struct iwl_priv *priv,
|
|
struct iwl_rx_packet *pkt)
|
|
{
|
|
bool rc = true;
|
|
int combined_plcp_delta;
|
|
unsigned int plcp_msec;
|
|
unsigned long plcp_received_jiffies;
|
|
|
|
/*
|
|
* check for plcp_err and trigger radio reset if it exceeds
|
|
* the plcp error threshold plcp_delta.
|
|
*/
|
|
plcp_received_jiffies = jiffies;
|
|
plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
|
|
(long) priv->plcp_jiffies);
|
|
priv->plcp_jiffies = plcp_received_jiffies;
|
|
/*
|
|
* check to make sure plcp_msec is not 0 to prevent division
|
|
* by zero.
|
|
*/
|
|
if (plcp_msec) {
|
|
combined_plcp_delta =
|
|
(le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err) -
|
|
le32_to_cpu(priv->statistics.rx.ofdm.plcp_err)) +
|
|
(le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err) -
|
|
le32_to_cpu(priv->statistics.rx.ofdm_ht.plcp_err));
|
|
|
|
if ((combined_plcp_delta > 0) &&
|
|
((combined_plcp_delta * 100) / plcp_msec) >
|
|
priv->cfg->plcp_delta_threshold) {
|
|
/*
|
|
* if plcp_err exceed the threshold,
|
|
* the following data is printed in csv format:
|
|
* Text: plcp_err exceeded %d,
|
|
* Received ofdm.plcp_err,
|
|
* Current ofdm.plcp_err,
|
|
* Received ofdm_ht.plcp_err,
|
|
* Current ofdm_ht.plcp_err,
|
|
* combined_plcp_delta,
|
|
* plcp_msec
|
|
*/
|
|
IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, "
|
|
"%u, %u, %u, %u, %d, %u mSecs\n",
|
|
priv->cfg->plcp_delta_threshold,
|
|
le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err),
|
|
le32_to_cpu(priv->statistics.rx.ofdm.plcp_err),
|
|
le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err),
|
|
le32_to_cpu(
|
|
priv->statistics.rx.ofdm_ht.plcp_err),
|
|
combined_plcp_delta, plcp_msec);
|
|
rc = false;
|
|
}
|
|
}
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(iwl_good_plcp_health);
|
|
|
|
static void iwl_recover_from_statistics(struct iwl_priv *priv,
|
|
struct iwl_rx_packet *pkt)
|
|
{
|
|
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
|
|
return;
|
|
if (iwl_is_associated(priv)) {
|
|
if (priv->cfg->ops->lib->check_ack_health) {
|
|
if (!priv->cfg->ops->lib->check_ack_health(
|
|
priv, pkt)) {
|
|
/*
|
|
* low ack count detected
|
|
* restart Firmware
|
|
*/
|
|
IWL_ERR(priv, "low ack count detected, "
|
|
"restart firmware\n");
|
|
iwl_force_reset(priv, IWL_FW_RESET);
|
|
}
|
|
} else if (priv->cfg->ops->lib->check_plcp_health) {
|
|
if (!priv->cfg->ops->lib->check_plcp_health(
|
|
priv, pkt)) {
|
|
/*
|
|
* high plcp error detected
|
|
* reset Radio
|
|
*/
|
|
iwl_force_reset(priv, IWL_RF_RESET);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void iwl_rx_statistics(struct iwl_priv *priv,
|
|
struct iwl_rx_mem_buffer *rxb)
|
|
{
|
|
int change;
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
|
|
|
|
IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
|
|
(int)sizeof(priv->statistics),
|
|
le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
|
|
|
|
change = ((priv->statistics.general.temperature !=
|
|
pkt->u.stats.general.temperature) ||
|
|
((priv->statistics.flag &
|
|
STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
|
|
(pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUG
|
|
iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
|
|
#endif
|
|
iwl_recover_from_statistics(priv, pkt);
|
|
|
|
memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
|
|
|
|
set_bit(STATUS_STATISTICS, &priv->status);
|
|
|
|
/* Reschedule the statistics timer to occur in
|
|
* REG_RECALIB_PERIOD seconds to ensure we get a
|
|
* thermal update even if the uCode doesn't give
|
|
* us one */
|
|
mod_timer(&priv->statistics_periodic, jiffies +
|
|
msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
|
|
|
|
if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
|
|
(pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
|
|
iwl_rx_calc_noise(priv);
|
|
queue_work(priv->workqueue, &priv->run_time_calib_work);
|
|
}
|
|
if (priv->cfg->ops->lib->temp_ops.temperature && change)
|
|
priv->cfg->ops->lib->temp_ops.temperature(priv);
|
|
}
|
|
EXPORT_SYMBOL(iwl_rx_statistics);
|
|
|
|
void iwl_reply_statistics(struct iwl_priv *priv,
|
|
struct iwl_rx_mem_buffer *rxb)
|
|
{
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
|
|
if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
|
|
#ifdef CONFIG_IWLWIFI_DEBUG
|
|
memset(&priv->accum_statistics, 0,
|
|
sizeof(struct iwl_notif_statistics));
|
|
memset(&priv->delta_statistics, 0,
|
|
sizeof(struct iwl_notif_statistics));
|
|
memset(&priv->max_delta, 0,
|
|
sizeof(struct iwl_notif_statistics));
|
|
#endif
|
|
IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
|
|
}
|
|
iwl_rx_statistics(priv, rxb);
|
|
}
|
|
EXPORT_SYMBOL(iwl_reply_statistics);
|
|
|
|
/* Calc max signal level (dBm) among 3 possible receivers */
|
|
static inline int iwl_calc_rssi(struct iwl_priv *priv,
|
|
struct iwl_rx_phy_res *rx_resp)
|
|
{
|
|
return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
|
|
}
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUG
|
|
/**
|
|
* iwl_dbg_report_frame - dump frame to syslog during debug sessions
|
|
*
|
|
* You may hack this function to show different aspects of received frames,
|
|
* including selective frame dumps.
|
|
* group100 parameter selects whether to show 1 out of 100 good data frames.
|
|
* All beacon and probe response frames are printed.
|
|
*/
|
|
static void iwl_dbg_report_frame(struct iwl_priv *priv,
|
|
struct iwl_rx_phy_res *phy_res, u16 length,
|
|
struct ieee80211_hdr *header, int group100)
|
|
{
|
|
u32 to_us;
|
|
u32 print_summary = 0;
|
|
u32 print_dump = 0; /* set to 1 to dump all frames' contents */
|
|
u32 hundred = 0;
|
|
u32 dataframe = 0;
|
|
__le16 fc;
|
|
u16 seq_ctl;
|
|
u16 channel;
|
|
u16 phy_flags;
|
|
u32 rate_n_flags;
|
|
u32 tsf_low;
|
|
int rssi;
|
|
|
|
if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
|
|
return;
|
|
|
|
/* MAC header */
|
|
fc = header->frame_control;
|
|
seq_ctl = le16_to_cpu(header->seq_ctrl);
|
|
|
|
/* metadata */
|
|
channel = le16_to_cpu(phy_res->channel);
|
|
phy_flags = le16_to_cpu(phy_res->phy_flags);
|
|
rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
|
|
|
|
/* signal statistics */
|
|
rssi = iwl_calc_rssi(priv, phy_res);
|
|
tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
|
|
|
|
to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
|
|
|
|
/* if data frame is to us and all is good,
|
|
* (optionally) print summary for only 1 out of every 100 */
|
|
if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
|
|
cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
|
|
dataframe = 1;
|
|
if (!group100)
|
|
print_summary = 1; /* print each frame */
|
|
else if (priv->framecnt_to_us < 100) {
|
|
priv->framecnt_to_us++;
|
|
print_summary = 0;
|
|
} else {
|
|
priv->framecnt_to_us = 0;
|
|
print_summary = 1;
|
|
hundred = 1;
|
|
}
|
|
} else {
|
|
/* print summary for all other frames */
|
|
print_summary = 1;
|
|
}
|
|
|
|
if (print_summary) {
|
|
char *title;
|
|
int rate_idx;
|
|
u32 bitrate;
|
|
|
|
if (hundred)
|
|
title = "100Frames";
|
|
else if (ieee80211_has_retry(fc))
|
|
title = "Retry";
|
|
else if (ieee80211_is_assoc_resp(fc))
|
|
title = "AscRsp";
|
|
else if (ieee80211_is_reassoc_resp(fc))
|
|
title = "RasRsp";
|
|
else if (ieee80211_is_probe_resp(fc)) {
|
|
title = "PrbRsp";
|
|
print_dump = 1; /* dump frame contents */
|
|
} else if (ieee80211_is_beacon(fc)) {
|
|
title = "Beacon";
|
|
print_dump = 1; /* dump frame contents */
|
|
} else if (ieee80211_is_atim(fc))
|
|
title = "ATIM";
|
|
else if (ieee80211_is_auth(fc))
|
|
title = "Auth";
|
|
else if (ieee80211_is_deauth(fc))
|
|
title = "DeAuth";
|
|
else if (ieee80211_is_disassoc(fc))
|
|
title = "DisAssoc";
|
|
else
|
|
title = "Frame";
|
|
|
|
rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
|
|
if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
|
|
bitrate = 0;
|
|
WARN_ON_ONCE(1);
|
|
} else {
|
|
bitrate = iwl_rates[rate_idx].ieee / 2;
|
|
}
|
|
|
|
/* print frame summary.
|
|
* MAC addresses show just the last byte (for brevity),
|
|
* but you can hack it to show more, if you'd like to. */
|
|
if (dataframe)
|
|
IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
|
|
"len=%u, rssi=%d, chnl=%d, rate=%u, \n",
|
|
title, le16_to_cpu(fc), header->addr1[5],
|
|
length, rssi, channel, bitrate);
|
|
else {
|
|
/* src/dst addresses assume managed mode */
|
|
IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
|
|
"len=%u, rssi=%d, tim=%lu usec, "
|
|
"phy=0x%02x, chnl=%d\n",
|
|
title, le16_to_cpu(fc), header->addr1[5],
|
|
header->addr3[5], length, rssi,
|
|
tsf_low - priv->scan_start_tsf,
|
|
phy_flags, channel);
|
|
}
|
|
}
|
|
if (print_dump)
|
|
iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* returns non-zero if packet should be dropped
|
|
*/
|
|
int iwl_set_decrypted_flag(struct iwl_priv *priv,
|
|
struct ieee80211_hdr *hdr,
|
|
u32 decrypt_res,
|
|
struct ieee80211_rx_status *stats)
|
|
{
|
|
u16 fc = le16_to_cpu(hdr->frame_control);
|
|
|
|
if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
|
|
return 0;
|
|
|
|
if (!(fc & IEEE80211_FCTL_PROTECTED))
|
|
return 0;
|
|
|
|
IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
|
|
switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
|
|
case RX_RES_STATUS_SEC_TYPE_TKIP:
|
|
/* The uCode has got a bad phase 1 Key, pushes the packet.
|
|
* Decryption will be done in SW. */
|
|
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
|
|
RX_RES_STATUS_BAD_KEY_TTAK)
|
|
break;
|
|
|
|
case RX_RES_STATUS_SEC_TYPE_WEP:
|
|
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
|
|
RX_RES_STATUS_BAD_ICV_MIC) {
|
|
/* bad ICV, the packet is destroyed since the
|
|
* decryption is inplace, drop it */
|
|
IWL_DEBUG_RX(priv, "Packet destroyed\n");
|
|
return -1;
|
|
}
|
|
case RX_RES_STATUS_SEC_TYPE_CCMP:
|
|
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
|
|
RX_RES_STATUS_DECRYPT_OK) {
|
|
IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
|
|
stats->flag |= RX_FLAG_DECRYPTED;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(iwl_set_decrypted_flag);
|
|
|
|
static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
|
|
{
|
|
u32 decrypt_out = 0;
|
|
|
|
if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
|
|
RX_RES_STATUS_STATION_FOUND)
|
|
decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
|
|
RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
|
|
|
|
decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
|
|
|
|
/* packet was not encrypted */
|
|
if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
|
|
RX_RES_STATUS_SEC_TYPE_NONE)
|
|
return decrypt_out;
|
|
|
|
/* packet was encrypted with unknown alg */
|
|
if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
|
|
RX_RES_STATUS_SEC_TYPE_ERR)
|
|
return decrypt_out;
|
|
|
|
/* decryption was not done in HW */
|
|
if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
|
|
RX_MPDU_RES_STATUS_DEC_DONE_MSK)
|
|
return decrypt_out;
|
|
|
|
switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
|
|
|
|
case RX_RES_STATUS_SEC_TYPE_CCMP:
|
|
/* alg is CCM: check MIC only */
|
|
if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
|
|
/* Bad MIC */
|
|
decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
|
|
else
|
|
decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
|
|
|
|
break;
|
|
|
|
case RX_RES_STATUS_SEC_TYPE_TKIP:
|
|
if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
|
|
/* Bad TTAK */
|
|
decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
|
|
break;
|
|
}
|
|
/* fall through if TTAK OK */
|
|
default:
|
|
if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
|
|
decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
|
|
else
|
|
decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
|
|
break;
|
|
};
|
|
|
|
IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
|
|
decrypt_in, decrypt_out);
|
|
|
|
return decrypt_out;
|
|
}
|
|
|
|
static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
|
|
struct ieee80211_hdr *hdr,
|
|
u16 len,
|
|
u32 ampdu_status,
|
|
struct iwl_rx_mem_buffer *rxb,
|
|
struct ieee80211_rx_status *stats)
|
|
{
|
|
struct sk_buff *skb;
|
|
int ret = 0;
|
|
__le16 fc = hdr->frame_control;
|
|
|
|
/* We only process data packets if the interface is open */
|
|
if (unlikely(!priv->is_open)) {
|
|
IWL_DEBUG_DROP_LIMIT(priv,
|
|
"Dropping packet while interface is not open.\n");
|
|
return;
|
|
}
|
|
|
|
/* In case of HW accelerated crypto and bad decryption, drop */
|
|
if (!priv->cfg->mod_params->sw_crypto &&
|
|
iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
|
|
return;
|
|
|
|
skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
|
|
if (!skb) {
|
|
IWL_ERR(priv, "alloc_skb failed\n");
|
|
return;
|
|
}
|
|
|
|
skb_reserve(skb, IWL_LINK_HDR_MAX);
|
|
skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
|
|
|
|
/* mac80211 currently doesn't support paged SKB. Convert it to
|
|
* linear SKB for management frame and data frame requires
|
|
* software decryption or software defragementation. */
|
|
if (ieee80211_is_mgmt(fc) ||
|
|
ieee80211_has_protected(fc) ||
|
|
ieee80211_has_morefrags(fc) ||
|
|
le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG ||
|
|
(ieee80211_is_data_qos(fc) &&
|
|
*ieee80211_get_qos_ctl(hdr) &
|
|
IEEE80211_QOS_CONTROL_A_MSDU_PRESENT))
|
|
ret = skb_linearize(skb);
|
|
else
|
|
ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
|
|
0 : -ENOMEM;
|
|
|
|
if (ret) {
|
|
kfree_skb(skb);
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* XXX: We cannot touch the page and its virtual memory (hdr) after
|
|
* here. It might have already been freed by the above skb change.
|
|
*/
|
|
|
|
iwl_update_stats(priv, false, fc, len);
|
|
memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
|
|
|
|
ieee80211_rx(priv->hw, skb);
|
|
out:
|
|
priv->alloc_rxb_page--;
|
|
rxb->page = NULL;
|
|
}
|
|
|
|
/* Called for REPLY_RX (legacy ABG frames), or
|
|
* REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
|
|
void iwl_rx_reply_rx(struct iwl_priv *priv,
|
|
struct iwl_rx_mem_buffer *rxb)
|
|
{
|
|
struct ieee80211_hdr *header;
|
|
struct ieee80211_rx_status rx_status;
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
struct iwl_rx_phy_res *phy_res;
|
|
__le32 rx_pkt_status;
|
|
struct iwl4965_rx_mpdu_res_start *amsdu;
|
|
u32 len;
|
|
u32 ampdu_status;
|
|
u32 rate_n_flags;
|
|
|
|
/**
|
|
* REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
|
|
* REPLY_RX: physical layer info is in this buffer
|
|
* REPLY_RX_MPDU_CMD: physical layer info was sent in separate
|
|
* command and cached in priv->last_phy_res
|
|
*
|
|
* Here we set up local variables depending on which command is
|
|
* received.
|
|
*/
|
|
if (pkt->hdr.cmd == REPLY_RX) {
|
|
phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
|
|
header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
|
|
+ phy_res->cfg_phy_cnt);
|
|
|
|
len = le16_to_cpu(phy_res->byte_count);
|
|
rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
|
|
phy_res->cfg_phy_cnt + len);
|
|
ampdu_status = le32_to_cpu(rx_pkt_status);
|
|
} else {
|
|
if (!priv->last_phy_res[0]) {
|
|
IWL_ERR(priv, "MPDU frame without cached PHY data\n");
|
|
return;
|
|
}
|
|
phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
|
|
amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
|
|
header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
|
|
len = le16_to_cpu(amsdu->byte_count);
|
|
rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
|
|
ampdu_status = iwl_translate_rx_status(priv,
|
|
le32_to_cpu(rx_pkt_status));
|
|
}
|
|
|
|
if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
|
|
IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
|
|
phy_res->cfg_phy_cnt);
|
|
return;
|
|
}
|
|
|
|
if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
|
|
!(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
|
|
IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
|
|
le32_to_cpu(rx_pkt_status));
|
|
return;
|
|
}
|
|
|
|
/* This will be used in several places later */
|
|
rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
|
|
|
|
/* rx_status carries information about the packet to mac80211 */
|
|
rx_status.mactime = le64_to_cpu(phy_res->timestamp);
|
|
rx_status.freq =
|
|
ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
|
|
rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
|
|
IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
|
|
rx_status.rate_idx =
|
|
iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
|
|
rx_status.flag = 0;
|
|
|
|
/* TSF isn't reliable. In order to allow smooth user experience,
|
|
* this W/A doesn't propagate it to the mac80211 */
|
|
/*rx_status.flag |= RX_FLAG_TSFT;*/
|
|
|
|
priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
|
|
|
|
/* Find max signal strength (dBm) among 3 antenna/receiver chains */
|
|
rx_status.signal = iwl_calc_rssi(priv, phy_res);
|
|
|
|
/* Meaningful noise values are available only from beacon statistics,
|
|
* which are gathered only when associated, and indicate noise
|
|
* only for the associated network channel ...
|
|
* Ignore these noise values while scanning (other channels) */
|
|
if (iwl_is_associated(priv) &&
|
|
!test_bit(STATUS_SCANNING, &priv->status)) {
|
|
rx_status.noise = priv->last_rx_noise;
|
|
} else {
|
|
rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
|
|
}
|
|
|
|
/* Reset beacon noise level if not associated. */
|
|
if (!iwl_is_associated(priv))
|
|
priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUG
|
|
/* Set "1" to report good data frames in groups of 100 */
|
|
if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
|
|
iwl_dbg_report_frame(priv, phy_res, len, header, 1);
|
|
#endif
|
|
iwl_dbg_log_rx_data_frame(priv, len, header);
|
|
IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
|
|
rx_status.signal, rx_status.noise,
|
|
(unsigned long long)rx_status.mactime);
|
|
|
|
/*
|
|
* "antenna number"
|
|
*
|
|
* It seems that the antenna field in the phy flags value
|
|
* is actually a bit field. This is undefined by radiotap,
|
|
* it wants an actual antenna number but I always get "7"
|
|
* for most legacy frames I receive indicating that the
|
|
* same frame was received on all three RX chains.
|
|
*
|
|
* I think this field should be removed in favor of a
|
|
* new 802.11n radiotap field "RX chains" that is defined
|
|
* as a bitmask.
|
|
*/
|
|
rx_status.antenna =
|
|
(le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
|
|
>> RX_RES_PHY_FLAGS_ANTENNA_POS;
|
|
|
|
/* set the preamble flag if appropriate */
|
|
if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
|
|
rx_status.flag |= RX_FLAG_SHORTPRE;
|
|
|
|
/* Set up the HT phy flags */
|
|
if (rate_n_flags & RATE_MCS_HT_MSK)
|
|
rx_status.flag |= RX_FLAG_HT;
|
|
if (rate_n_flags & RATE_MCS_HT40_MSK)
|
|
rx_status.flag |= RX_FLAG_40MHZ;
|
|
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
|
rx_status.flag |= RX_FLAG_SHORT_GI;
|
|
|
|
iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
|
|
rxb, &rx_status);
|
|
}
|
|
EXPORT_SYMBOL(iwl_rx_reply_rx);
|
|
|
|
/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
|
|
* This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
|
|
void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
|
|
struct iwl_rx_mem_buffer *rxb)
|
|
{
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
priv->last_phy_res[0] = 1;
|
|
memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
|
|
sizeof(struct iwl_rx_phy_res));
|
|
}
|
|
EXPORT_SYMBOL(iwl_rx_reply_rx_phy);
|