5810323ba6
This fixes a bug which if we probe a non-existing
I2C device, and the SMU returns 0xFF, from then on
we can never communicate with the SMU, because the
code before this patch reads and interprets 0xFF
as a terminal error, and thus we never write 0
into register 90 to clear the status (and
subsequently send a new command to the SMU.)
It is not an error that the SMU returns status
0xFF. This means that the SMU executed the last
command successfully (execution status), but the
command result is an error of some sort (execution
result), depending on what the command was.
When doing a status check of the SMU, before we
send a new command, the only status which
precludes us from sending a new command is 0--the
SMU hasn't finished executing a previous command,
and 0xFC--the SMU is busy.
This bug was seen as the following line in the
kernel log,
amdgpu: Msg issuing pre-check failed(0xff) and SMU may be not in the right state!
when subsequent SMU commands, not necessarily
related to I2C, were sent to the SMU.
This patch fixes this bug.
v2: Add a comment to the description of
__smu_cmn_poll_stat() to explain why we're NOT
defining the SMU FW return codes as macros, but
are instead hard-coding them. Such a change, can
be followed up by a subsequent patch.
v3: The changes are,
a) Add comments to break labels in
__smu_cmn_reg2errno().
b) When an unknown/unspecified/undefined result is
returned back from the SMU, map that to
-EREMOTEIO, to distinguish failure at the SMU
FW.
c) Add kernel-doc to
smu_cmn_send_msg_without_waiting(),
smu_cmn_wait_for_response(),
smu_cmn_send_smc_msg_with_param().
d) In smu_cmn_send_smc_msg_with_param(), since we
wait for completion of the command, if the
result of the completion is
undefined/unknown/unspecified, we print that to
the kernel log.
v4: a) Add macros as requested, though redundant, to
be removed when SMU consolidates for all
ASICs--see comment in code.
b) Get out if the SMU code is unknown.
v5: Rename the macro names.
Cc: Alex Deucher <Alexander.Deucher@amd.com>
Cc: Evan Quan <evan.quan@amd.com>
Cc: Lijo Lazar <Lijo.Lazar@amd.com>
Fixes: fcb1fe9c9e ("drm/amd/powerplay: pre-check the SMU state before issuing message")
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
115 lines
3.7 KiB
C
115 lines
3.7 KiB
C
/*
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* Copyright 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __SMU_CMN_H__
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#define __SMU_CMN_H__
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#include "amdgpu_smu.h"
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#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4)
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int smu_cmn_send_msg_without_waiting(struct smu_context *smu,
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uint16_t msg_index,
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uint32_t param);
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int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
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enum smu_message_type msg,
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uint32_t param,
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uint32_t *read_arg);
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int smu_cmn_send_smc_msg(struct smu_context *smu,
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enum smu_message_type msg,
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uint32_t *read_arg);
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int smu_cmn_wait_for_response(struct smu_context *smu);
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int smu_cmn_to_asic_specific_index(struct smu_context *smu,
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enum smu_cmn2asic_mapping_type type,
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uint32_t index);
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int smu_cmn_feature_is_supported(struct smu_context *smu,
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enum smu_feature_mask mask);
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int smu_cmn_feature_is_enabled(struct smu_context *smu,
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enum smu_feature_mask mask);
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bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
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enum smu_clk_type clk_type);
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int smu_cmn_get_enabled_mask(struct smu_context *smu,
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uint32_t *feature_mask,
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uint32_t num);
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int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
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uint32_t *feature_mask,
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uint32_t num);
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uint64_t smu_cmn_get_indep_throttler_status(
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const unsigned long dep_status,
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const uint8_t *throttler_map);
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int smu_cmn_feature_update_enable_state(struct smu_context *smu,
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uint64_t feature_mask,
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bool enabled);
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int smu_cmn_feature_set_enabled(struct smu_context *smu,
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enum smu_feature_mask mask,
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bool enable);
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size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
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char *buf);
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int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
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uint64_t new_mask);
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int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
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bool no_hw_disablement,
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enum smu_feature_mask mask);
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int smu_cmn_get_smc_version(struct smu_context *smu,
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uint32_t *if_version,
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uint32_t *smu_version);
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int smu_cmn_update_table(struct smu_context *smu,
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enum smu_table_id table_index,
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int argument,
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void *table_data,
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bool drv2smu);
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int smu_cmn_write_watermarks_table(struct smu_context *smu);
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int smu_cmn_write_pptable(struct smu_context *smu);
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int smu_cmn_get_metrics_table_locked(struct smu_context *smu,
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void *metrics_table,
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bool bypass_cache);
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int smu_cmn_get_metrics_table(struct smu_context *smu,
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void *metrics_table,
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bool bypass_cache);
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void smu_cmn_init_soft_gpu_metrics(void *table, uint8_t frev, uint8_t crev);
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int smu_cmn_set_mp1_state(struct smu_context *smu,
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enum pp_mp1_state mp1_state);
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#endif
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#endif
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