dd2939efd5
[Why] HPD disable and enable sequences are not mutually exclusive on Linux. For HPDs that spans over 1s (i.e. HPD low = 1s), part of the disable sequence (specifically, a request to SMU to lower refclk) could come right before the call to PHY enable, causing DMUB to access an unresponsive PHY and thus a hard hang on the system. [How] Disable 48mhz refclk off on native DP. Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| dce60 | ||
| dce100 | ||
| dce110 | ||
| dce112 | ||
| dce120 | ||
| dcn10 | ||
| dcn20 | ||
| dcn21 | ||
| dcn30 | ||
| dcn31 | ||
| dcn301 | ||
| clk_mgr.c | ||
| Makefile | ||