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857a26222f
linux/drivers/fpga
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Xiao Guangrong 857a26222f fpga: dfl: afu: add afu sub feature support 
User Accelerated Function Unit sub feature exposes the MMIO region of
the AFU. After valid PR bitstream is programmed and the port is enabled,
then this MMIO region could be accessed.

This patch adds support to enumerate the AFU MMIO region and expose it
to userspace via mmap file operation. Below interfaces are exposed to user:

Sysfs interface:
* /sys/class/fpga_region/<regionX>/<dfl-port.x>/afu_id
  Read-only. Indicate which PR bitstream is programmed to this AFU.

Ioctl interfaces:
* DFL_FPGA_PORT_GET_INFO
  Provide info to userspace on the number of supported region.
  Only UAFU region is supported now.

* DFL_FPGA_PORT_GET_REGION_INFO
  Provide region information, including access permission, region size,
  offset from the start of device fd.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-07-15 13:55:47 +02:00
..
altera-cvp.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
altera-fpga2sdram.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-freeze-bridge.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-hps2fpga.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-pr-ip-core-plat.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-pr-ip-core.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-ps-spi.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
dfl-afu-main.c fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-afu-region.c fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-afu.h fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-fme-br.c fpga: dfl: add fpga bridge platform driver for FME 2018-07-15 13:55:46 +02:00
dfl-fme-main.c fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-mgr.c fpga: dfl: fme-mgr: add compat_id support 2018-07-15 13:55:46 +02:00
dfl-fme-pr.c fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-pr.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-region.c fpga: dfl: fme-region: add support for compat_id 2018-07-15 13:55:46 +02:00
dfl-fme.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-pci.c fpga: dfl-pci: add enumeration for feature devices 2018-07-15 13:55:45 +02:00
dfl.c fpga: dfl: add dfl_fpga_check_port_id function. 2018-07-15 13:55:45 +02:00
dfl.h fpga: dfl: add dfl_fpga_check_port_id function. 2018-07-15 13:55:45 +02:00
fpga-bridge.c fpga: clarify that unregister functions also free 2018-05-25 18:23:56 +02:00
fpga-mgr.c fpga: mgr: add status for fpga-manager 2018-07-15 13:55:44 +02:00
fpga-region.c fpga: region: add compat_id support 2018-07-15 13:55:44 +02:00
ice40-spi.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
Kconfig fpga: dfl: add FPGA Accelerated Function Unit driver basic framework 2018-07-15 13:55:46 +02:00
machxo2-spi.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
Makefile fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
of-fpga-region.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
socfpga-a10.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
socfpga.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
ts73xx-fpga.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
xilinx-pr-decoupler.c fpga: bridge: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
xilinx-spi.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00
zynq-fpga.c fpga: manager: change api, don't use drvdata 2018-05-25 18:23:55 +02:00