Abhinav Kumar 8531f0587f drm/msm/dsi: configure VCO rate for 10nm PLL driver ... Currenty the VCO rate in the 10nm PLL driver relies on the parent rate which is not configured. Configure the VCO rate to 19.2 Mhz as required by the 10nm PLL driver. Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>		2018-11-30 11:57:53 -05:00
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phy	drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY	2018-06-03 16:48:59 -04:00
pll	drm/msm/dsi: configure VCO rate for 10nm PLL driver	2018-11-30 11:57:53 -05:00
dsi_cfg.c	drm/msm/dsi: add implementation for helper functions	2018-07-25 07:51:04 -04:00
dsi_cfg.h	drm/msm/dsi: adjust dsi timing for dual dsi mode	2018-07-26 10:40:14 -04:00
dsi_host.c	drm/msm: dsi: Return errors whan dt parsing fails	2018-10-03 20:24:49 -04:00
dsi_manager.c	drm/msm: dsi: Initialize msm_dsi->id to -1	2018-10-03 20:24:49 -04:00
dsi.c	drm/msm: Don't fail bind if nothing connected to dsi	2018-10-03 20:24:50 -04:00
dsi.h	drm/msm/dsi: Use one connector for dual DSI mode	2018-07-26 10:40:14 -04:00
dsi.xml.h	drm/msm: update generated headers	2018-08-10 18:49:18 -04:00
mmss_cc.xml.h	drm/msm: update generated headers	2018-08-10 18:49:18 -04:00
sfpb.xml.h	drm/msm: update generated headers	2018-08-10 18:49:18 -04:00