e72550928f
The ETM device can't keep up with the core pipeline when cpu core is at full speed. This may cause overflow within core and its ETM. This is a common phenomenon on ETM devices. On HiSilicon Hip08 platform, a specific feature is added to set core pipeline. So commit rate can be reduced manually to avoid ETM overflow. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Qi Liu <liuqi115@huawei.com> [Modified changelog title and Kconfig description] Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201208182651.1597945-4-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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| .. | ||
| coresight-catu.c | ||
| coresight-catu.h | ||
| coresight-core.c | ||
| coresight-cpu-debug.c | ||
| coresight-cti-core.c | ||
| coresight-cti-platform.c | ||
| coresight-cti-sysfs.c | ||
| coresight-cti.h | ||
| coresight-etb10.c | ||
| coresight-etm3x-core.c | ||
| coresight-etm3x-sysfs.c | ||
| coresight-etm4x-core.c | ||
| coresight-etm4x-sysfs.c | ||
| coresight-etm4x.h | ||
| coresight-etm-cp14.c | ||
| coresight-etm-perf.c | ||
| coresight-etm-perf.h | ||
| coresight-etm.h | ||
| coresight-funnel.c | ||
| coresight-platform.c | ||
| coresight-priv.h | ||
| coresight-replicator.c | ||
| coresight-stm.c | ||
| coresight-sysfs.c | ||
| coresight-tmc-core.c | ||
| coresight-tmc-etf.c | ||
| coresight-tmc-etr.c | ||
| coresight-tmc.h | ||
| coresight-tpiu.c | ||
| Kconfig | ||
| Makefile | ||