forked from Minki/linux
85f8879ca4
The second cell in the PWM specifier denotes the period in nanoseconds, not the duty cycle. The latter can be freely configured at runtime and a PWM with a fixed duty cycle would be rather pointless. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: "Benoît Thébaudeau" <benoit.thebaudeau@advansee.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
19 lines
508 B
Plaintext
19 lines
508 B
Plaintext
Tegra SoC PWFM controller
|
|
|
|
Required properties:
|
|
- compatible: should be one of:
|
|
- "nvidia,tegra20-pwm"
|
|
- "nvidia,tegra30-pwm"
|
|
- reg: physical base address and length of the controller's registers
|
|
- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
|
|
first cell specifies the per-chip index of the PWM to use and the second
|
|
cell is the period in nanoseconds.
|
|
|
|
Example:
|
|
|
|
pwm: pwm@7000a000 {
|
|
compatible = "nvidia,tegra20-pwm";
|
|
reg = <0x7000a000 0x100>;
|
|
#pwm-cells = <2>;
|
|
};
|